drm/radeon: don't power gate paused UVD streams

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c
index b9c0529b4a2e..4b5c1fcb515d 100644
--- a/drivers/gpu/drm/radeon/radeon_uvd.c
+++ b/drivers/gpu/drm/radeon/radeon_uvd.c
@@ -778,6 +778,8 @@ static void radeon_uvd_idle_work_handler(struct work_struct *work)
 
         if (radeon_fence_count_emitted(rdev, R600_RING_TYPE_UVD_INDEX) == 0) {
                 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
+                        radeon_uvd_count_handles(rdev, &rdev->pm.dpm.sd,
+                                                 &rdev->pm.dpm.hd);
                         radeon_dpm_enable_uvd(rdev, false);
                 } else {
                         radeon_set_uvd_clocks(rdev, 0, 0);