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authorJerome Glisse <jglisse@redhat.com>2009-09-07 20:10:24 -0400
committerDave Airlie <airlied@redhat.com>2009-09-07 21:15:52 -0400
commit3ce0a23d2d253185df24e22e3d5f89800bb3dd1c (patch)
tree4b4defdbe33aec7317101cce0f89c33083f8d17b /drivers/gpu/drm/radeon/radeon_reg.h
parent4ce001abafafe77e5dd943d1480fc9f87894e96f (diff)
drm/radeon/kms: add r600 KMS support
This adds the r600 KMS + CS support to the Linux kernel. The r600 TTM support is quite basic and still needs more work esp around using interrupts, but the polled fencing should work okay for now. Also currently TTM is using memcpy to do VRAM moves, the code is here to use a 3D blit to do this, but isn't fully debugged yet. Authors: Alex Deucher <alexdeucher@gmail.com> Dave Airlie <airlied@redhat.com> Jerome Glisse <jglisse@redhat.com> Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_reg.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_reg.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h
index 28be2f1165cb..21da871a793c 100644
--- a/drivers/gpu/drm/radeon/radeon_reg.h
+++ b/drivers/gpu/drm/radeon/radeon_reg.h
@@ -3255,6 +3255,24 @@
3255#define RADEON_CP_RB_WPTR 0x0714 3255#define RADEON_CP_RB_WPTR 0x0714
3256#define RADEON_CP_RB_RPTR_WR 0x071c 3256#define RADEON_CP_RB_RPTR_WR 0x071c
3257 3257
3258#define RADEON_SCRATCH_UMSK 0x0770
3259#define RADEON_SCRATCH_ADDR 0x0774
3260
3261#define R600_CP_RB_BASE 0xc100
3262#define R600_CP_RB_CNTL 0xc104
3263# define R600_RB_BUFSZ(x) ((x) << 0)
3264# define R600_RB_BLKSZ(x) ((x) << 8)
3265# define R600_RB_NO_UPDATE (1 << 27)
3266# define R600_RB_RPTR_WR_ENA (1 << 31)
3267#define R600_CP_RB_RPTR_WR 0xc108
3268#define R600_CP_RB_RPTR_ADDR 0xc10c
3269#define R600_CP_RB_RPTR_ADDR_HI 0xc110
3270#define R600_CP_RB_WPTR 0xc114
3271#define R600_CP_RB_WPTR_ADDR 0xc118
3272#define R600_CP_RB_WPTR_ADDR_HI 0xc11c
3273#define R600_CP_RB_RPTR 0x8700
3274#define R600_CP_RB_WPTR_DELAY 0x8704
3275
3258#define RADEON_CP_IB_BASE 0x0738 3276#define RADEON_CP_IB_BASE 0x0738
3259#define RADEON_CP_IB_BUFSZ 0x073c 3277#define RADEON_CP_IB_BUFSZ 0x073c
3260 3278