diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-26 21:57:59 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-26 21:57:59 -0400 |
commit | c48c43e422c1404fd72c57d1d21a6f6d01e18900 (patch) | |
tree | 48e5d3828b4f5479361986535f71a1ae44e4f3c1 /drivers/gpu/drm/radeon/radeon_mode.h | |
parent | 520045db940a381d2bee1c1b2179f7921b40fb10 (diff) | |
parent | 135cba0dc399fdd47bd3ae305c1db75fcd77243f (diff) |
Merge branch 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (476 commits)
vmwgfx: Implement a proper GMR eviction mechanism
drm/radeon/kms: fix r6xx/7xx 1D tiling CS checker v2
drm/radeon/kms: properly compute group_size on 6xx/7xx
drm/radeon/kms: fix 2D tile height alignment in the r600 CS checker
drm/radeon/kms/evergreen: set the clear state to the blit state
drm/radeon/kms: don't poll dac load detect.
gpu: Add Intel GMA500(Poulsbo) Stub Driver
drm/radeon/kms: MC vram map needs to be >= pci aperture size
drm/radeon/kms: implement display watermark support for evergreen
drm/radeon/kms/evergreen: add some additional safe regs v2
drm/radeon/r600: fix tiling issues in CS checker.
drm/i915: Move gpu_write_list to per-ring
drm/i915: Invalidate the to-ring, flush the old-ring when updating domains
drm/i915/ringbuffer: Write the value passed in to the tail register
agp/intel: Restore valid PTE bit for Sandybridge after bdd3072
drm/i915: Fix flushing regression from 9af90d19f
drm/i915/sdvo: Remove unused encoding member
i915: enable AVI infoframe for intel_hdmi.c [v4]
drm/i915: Fix current fb blocking for page flip
drm/i915: IS_IRONLAKE is synonymous with gen == 5
...
Fix up conflicts in
- drivers/gpu/drm/i915/{i915_gem.c, i915/intel_overlay.c}: due to the
new simplified stack-based kmap_atomic() interface
- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c: added .llseek entry due to BKL
removal cleanups.
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_mode.h')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_mode.h | 53 |
1 files changed, 38 insertions, 15 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index 454c1dc7ea45..92457163d070 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h | |||
@@ -35,6 +35,7 @@ | |||
35 | #include <drm_edid.h> | 35 | #include <drm_edid.h> |
36 | #include <drm_dp_helper.h> | 36 | #include <drm_dp_helper.h> |
37 | #include <drm_fixed.h> | 37 | #include <drm_fixed.h> |
38 | #include <drm_crtc_helper.h> | ||
38 | #include <linux/i2c.h> | 39 | #include <linux/i2c.h> |
39 | #include <linux/i2c-algo-bit.h> | 40 | #include <linux/i2c-algo-bit.h> |
40 | 41 | ||
@@ -149,12 +150,6 @@ struct radeon_tmds_pll { | |||
149 | #define RADEON_PLL_USE_POST_DIV (1 << 12) | 150 | #define RADEON_PLL_USE_POST_DIV (1 << 12) |
150 | #define RADEON_PLL_IS_LCD (1 << 13) | 151 | #define RADEON_PLL_IS_LCD (1 << 13) |
151 | 152 | ||
152 | /* pll algo */ | ||
153 | enum radeon_pll_algo { | ||
154 | PLL_ALGO_LEGACY, | ||
155 | PLL_ALGO_NEW | ||
156 | }; | ||
157 | |||
158 | struct radeon_pll { | 153 | struct radeon_pll { |
159 | /* reference frequency */ | 154 | /* reference frequency */ |
160 | uint32_t reference_freq; | 155 | uint32_t reference_freq; |
@@ -187,8 +182,6 @@ struct radeon_pll { | |||
187 | 182 | ||
188 | /* pll id */ | 183 | /* pll id */ |
189 | uint32_t id; | 184 | uint32_t id; |
190 | /* pll algo */ | ||
191 | enum radeon_pll_algo algo; | ||
192 | }; | 185 | }; |
193 | 186 | ||
194 | struct radeon_i2c_chan { | 187 | struct radeon_i2c_chan { |
@@ -240,6 +233,8 @@ struct radeon_mode_info { | |||
240 | struct drm_property *tmds_pll_property; | 233 | struct drm_property *tmds_pll_property; |
241 | /* underscan */ | 234 | /* underscan */ |
242 | struct drm_property *underscan_property; | 235 | struct drm_property *underscan_property; |
236 | struct drm_property *underscan_hborder_property; | ||
237 | struct drm_property *underscan_vborder_property; | ||
243 | /* hardcoded DFP edid from BIOS */ | 238 | /* hardcoded DFP edid from BIOS */ |
244 | struct edid *bios_hardcoded_edid; | 239 | struct edid *bios_hardcoded_edid; |
245 | 240 | ||
@@ -335,22 +330,24 @@ struct radeon_encoder_ext_tmds { | |||
335 | struct radeon_atom_ss { | 330 | struct radeon_atom_ss { |
336 | uint16_t percentage; | 331 | uint16_t percentage; |
337 | uint8_t type; | 332 | uint8_t type; |
338 | uint8_t step; | 333 | uint16_t step; |
339 | uint8_t delay; | 334 | uint8_t delay; |
340 | uint8_t range; | 335 | uint8_t range; |
341 | uint8_t refdiv; | 336 | uint8_t refdiv; |
337 | /* asic_ss */ | ||
338 | uint16_t rate; | ||
339 | uint16_t amount; | ||
342 | }; | 340 | }; |
343 | 341 | ||
344 | struct radeon_encoder_atom_dig { | 342 | struct radeon_encoder_atom_dig { |
345 | bool linkb; | 343 | bool linkb; |
346 | /* atom dig */ | 344 | /* atom dig */ |
347 | bool coherent_mode; | 345 | bool coherent_mode; |
348 | int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */ | 346 | int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */ |
349 | /* atom lvds */ | 347 | /* atom lvds/edp */ |
350 | uint32_t lvds_misc; | 348 | uint32_t lcd_misc; |
351 | uint16_t panel_pwr_delay; | 349 | uint16_t panel_pwr_delay; |
352 | enum radeon_pll_algo pll_algo; | 350 | uint32_t lcd_ss_id; |
353 | struct radeon_atom_ss *ss; | ||
354 | /* panel mode */ | 351 | /* panel mode */ |
355 | struct drm_display_mode native_mode; | 352 | struct drm_display_mode native_mode; |
356 | }; | 353 | }; |
@@ -369,6 +366,8 @@ struct radeon_encoder { | |||
369 | uint32_t pixel_clock; | 366 | uint32_t pixel_clock; |
370 | enum radeon_rmx_type rmx_type; | 367 | enum radeon_rmx_type rmx_type; |
371 | enum radeon_underscan_type underscan_type; | 368 | enum radeon_underscan_type underscan_type; |
369 | uint32_t underscan_hborder; | ||
370 | uint32_t underscan_vborder; | ||
372 | struct drm_display_mode native_mode; | 371 | struct drm_display_mode native_mode; |
373 | void *enc_priv; | 372 | void *enc_priv; |
374 | int audio_polling_active; | 373 | int audio_polling_active; |
@@ -435,6 +434,11 @@ struct radeon_framebuffer { | |||
435 | struct drm_gem_object *obj; | 434 | struct drm_gem_object *obj; |
436 | }; | 435 | }; |
437 | 436 | ||
437 | /* radeon_get_crtc_scanoutpos() return flags */ | ||
438 | #define RADEON_SCANOUTPOS_VALID (1 << 0) | ||
439 | #define RADEON_SCANOUTPOS_INVBL (1 << 1) | ||
440 | #define RADEON_SCANOUTPOS_ACCURATE (1 << 2) | ||
441 | |||
438 | extern enum radeon_tv_std | 442 | extern enum radeon_tv_std |
439 | radeon_combios_get_tv_info(struct radeon_device *rdev); | 443 | radeon_combios_get_tv_info(struct radeon_device *rdev); |
440 | extern enum radeon_tv_std | 444 | extern enum radeon_tv_std |
@@ -490,6 +494,13 @@ extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); | |||
490 | 494 | ||
491 | extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); | 495 | extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); |
492 | 496 | ||
497 | extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev, | ||
498 | struct radeon_atom_ss *ss, | ||
499 | int id); | ||
500 | extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, | ||
501 | struct radeon_atom_ss *ss, | ||
502 | int id, u32 clock); | ||
503 | |||
493 | extern void radeon_compute_pll(struct radeon_pll *pll, | 504 | extern void radeon_compute_pll(struct radeon_pll *pll, |
494 | uint64_t freq, | 505 | uint64_t freq, |
495 | uint32_t *dot_clock_p, | 506 | uint32_t *dot_clock_p, |
@@ -513,6 +524,10 @@ extern void radeon_encoder_set_active_device(struct drm_encoder *encoder); | |||
513 | extern void radeon_crtc_load_lut(struct drm_crtc *crtc); | 524 | extern void radeon_crtc_load_lut(struct drm_crtc *crtc); |
514 | extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, | 525 | extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
515 | struct drm_framebuffer *old_fb); | 526 | struct drm_framebuffer *old_fb); |
527 | extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc, | ||
528 | struct drm_framebuffer *fb, | ||
529 | int x, int y, | ||
530 | enum mode_set_atomic state); | ||
516 | extern int atombios_crtc_mode_set(struct drm_crtc *crtc, | 531 | extern int atombios_crtc_mode_set(struct drm_crtc *crtc, |
517 | struct drm_display_mode *mode, | 532 | struct drm_display_mode *mode, |
518 | struct drm_display_mode *adjusted_mode, | 533 | struct drm_display_mode *adjusted_mode, |
@@ -522,7 +537,13 @@ extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode); | |||
522 | 537 | ||
523 | extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, | 538 | extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
524 | struct drm_framebuffer *old_fb); | 539 | struct drm_framebuffer *old_fb); |
525 | 540 | extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc, | |
541 | struct drm_framebuffer *fb, | ||
542 | int x, int y, | ||
543 | enum mode_set_atomic state); | ||
544 | extern int radeon_crtc_do_set_base(struct drm_crtc *crtc, | ||
545 | struct drm_framebuffer *fb, | ||
546 | int x, int y, int atomic); | ||
526 | extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, | 547 | extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, |
527 | struct drm_file *file_priv, | 548 | struct drm_file *file_priv, |
528 | uint32_t handle, | 549 | uint32_t handle, |
@@ -531,6 +552,8 @@ extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, | |||
531 | extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, | 552 | extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, |
532 | int x, int y); | 553 | int x, int y); |
533 | 554 | ||
555 | extern int radeon_get_crtc_scanoutpos(struct radeon_device *rdev, int crtc, int *vpos, int *hpos); | ||
556 | |||
534 | extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev); | 557 | extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev); |
535 | extern struct edid * | 558 | extern struct edid * |
536 | radeon_combios_get_hardcoded_edid(struct radeon_device *rdev); | 559 | radeon_combios_get_hardcoded_edid(struct radeon_device *rdev); |