diff options
author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2011-11-14 17:51:28 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2011-11-15 14:53:23 -0500 |
commit | 308e5bcbdb10452e8aba31aa21432fb67ee46d72 (patch) | |
tree | 5e4eebef07685c4047f54d1727fc9bcbace8889d /drivers/gpu/drm/radeon/radeon_fb.c | |
parent | 8cf5c9177151537e73ff1816540e4ba24b174391 (diff) |
drm: add an fb creation ioctl that takes a pixel format v5
To properly support the various plane formats supported by different
hardware, the kernel must know the pixel format of a framebuffer object.
So add a new ioctl taking a format argument corresponding to a fourcc
name from the new drm_fourcc.h header file. Implement the fb creation
hooks in terms of the new mode_fb_cmd2 using helpers where the old
bpp/depth values are needed.
v2: create DRM specific fourcc header file for sharing with libdrm etc
v3: fix rebase failure and use DRM fourcc codes in intel_display.c and
update commit message
v4: make fb_cmd2 handle field into an array for multi-object formats
pull in Ville's fix for the memcpy in drm_plane_init
apply Ville's cleanup to zero out fb_cmd2 arg in drm_mode_addfb
v5: add 'flags' field for interlaced support (from Ville)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Reviewed-by: Rob Clark <rob.clark@linaro.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_fb.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_fb.c | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c index 0b7b486c97e8..ea110ad2a841 100644 --- a/drivers/gpu/drm/radeon/radeon_fb.c +++ b/drivers/gpu/drm/radeon/radeon_fb.c | |||
@@ -103,7 +103,7 @@ static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj) | |||
103 | } | 103 | } |
104 | 104 | ||
105 | static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev, | 105 | static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev, |
106 | struct drm_mode_fb_cmd *mode_cmd, | 106 | struct drm_mode_fb_cmd2 *mode_cmd, |
107 | struct drm_gem_object **gobj_p) | 107 | struct drm_gem_object **gobj_p) |
108 | { | 108 | { |
109 | struct radeon_device *rdev = rfbdev->rdev; | 109 | struct radeon_device *rdev = rfbdev->rdev; |
@@ -114,13 +114,17 @@ static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev, | |||
114 | int ret; | 114 | int ret; |
115 | int aligned_size, size; | 115 | int aligned_size, size; |
116 | int height = mode_cmd->height; | 116 | int height = mode_cmd->height; |
117 | u32 bpp, depth; | ||
118 | |||
119 | drm_helper_get_fb_bpp_depth(mode_cmd->pixel_format, &depth, &bpp); | ||
117 | 120 | ||
118 | /* need to align pitch with crtc limits */ | 121 | /* need to align pitch with crtc limits */ |
119 | mode_cmd->pitch = radeon_align_pitch(rdev, mode_cmd->width, mode_cmd->bpp, fb_tiled) * ((mode_cmd->bpp + 1) / 8); | 122 | mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, bpp, |
123 | fb_tiled) * ((bpp + 1) / 8); | ||
120 | 124 | ||
121 | if (rdev->family >= CHIP_R600) | 125 | if (rdev->family >= CHIP_R600) |
122 | height = ALIGN(mode_cmd->height, 8); | 126 | height = ALIGN(mode_cmd->height, 8); |
123 | size = mode_cmd->pitch * height; | 127 | size = mode_cmd->pitches[0] * height; |
124 | aligned_size = ALIGN(size, PAGE_SIZE); | 128 | aligned_size = ALIGN(size, PAGE_SIZE); |
125 | ret = radeon_gem_object_create(rdev, aligned_size, 0, | 129 | ret = radeon_gem_object_create(rdev, aligned_size, 0, |
126 | RADEON_GEM_DOMAIN_VRAM, | 130 | RADEON_GEM_DOMAIN_VRAM, |
@@ -151,7 +155,7 @@ static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev, | |||
151 | if (tiling_flags) { | 155 | if (tiling_flags) { |
152 | ret = radeon_bo_set_tiling_flags(rbo, | 156 | ret = radeon_bo_set_tiling_flags(rbo, |
153 | tiling_flags | RADEON_TILING_SURFACE, | 157 | tiling_flags | RADEON_TILING_SURFACE, |
154 | mode_cmd->pitch); | 158 | mode_cmd->pitches[0]); |
155 | if (ret) | 159 | if (ret) |
156 | dev_err(rdev->dev, "FB failed to set tiling flags\n"); | 160 | dev_err(rdev->dev, "FB failed to set tiling flags\n"); |
157 | } | 161 | } |
@@ -187,7 +191,7 @@ static int radeonfb_create(struct radeon_fbdev *rfbdev, | |||
187 | struct radeon_device *rdev = rfbdev->rdev; | 191 | struct radeon_device *rdev = rfbdev->rdev; |
188 | struct fb_info *info; | 192 | struct fb_info *info; |
189 | struct drm_framebuffer *fb = NULL; | 193 | struct drm_framebuffer *fb = NULL; |
190 | struct drm_mode_fb_cmd mode_cmd; | 194 | struct drm_mode_fb_cmd2 mode_cmd; |
191 | struct drm_gem_object *gobj = NULL; | 195 | struct drm_gem_object *gobj = NULL; |
192 | struct radeon_bo *rbo = NULL; | 196 | struct radeon_bo *rbo = NULL; |
193 | struct device *device = &rdev->pdev->dev; | 197 | struct device *device = &rdev->pdev->dev; |
@@ -201,8 +205,8 @@ static int radeonfb_create(struct radeon_fbdev *rfbdev, | |||
201 | if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev)) | 205 | if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev)) |
202 | sizes->surface_bpp = 32; | 206 | sizes->surface_bpp = 32; |
203 | 207 | ||
204 | mode_cmd.bpp = sizes->surface_bpp; | 208 | mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, |
205 | mode_cmd.depth = sizes->surface_depth; | 209 | sizes->surface_depth); |
206 | 210 | ||
207 | ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj); | 211 | ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj); |
208 | rbo = gem_to_radeon_bo(gobj); | 212 | rbo = gem_to_radeon_bo(gobj); |