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authorAlex Deucher <alexdeucher@gmail.com>2009-11-24 13:32:59 -0500
committerDave Airlie <airlied@redhat.com>2009-12-07 19:22:44 -0500
commit5801ead6bd6bddf5505d6eab55f84d8ee8106cd8 (patch)
tree60cc75789c50aab78299499e05411c9140616bc2 /drivers/gpu/drm/radeon/radeon_encoders.c
parentf92a8b6758bdc0f277c4f42aa7d736a205ac9ded (diff)
drm/radeon/kms: add support for DP modesetting
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_encoders.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_encoders.c30
1 files changed, 19 insertions, 11 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index 8f3d67b6032c..397c86f761cd 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -250,6 +250,12 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder,
250 } 250 }
251 } 251 }
252 252
253 if (ASIC_IS_DCE3(rdev) &&
254 (radeon_encoder->active_device & (ATOM_DEVICE_DFP_SUPPORT))) {
255 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
256 radeon_dp_set_link_config(connector, mode);
257 }
258
253 return true; 259 return true;
254} 260}
255 261
@@ -719,11 +725,9 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action)
719 args.ucEncoderMode = atombios_get_encoder_mode(encoder); 725 args.ucEncoderMode = atombios_get_encoder_mode(encoder);
720 726
721 if (args.ucEncoderMode == ATOM_ENCODER_MODE_DP) { 727 if (args.ucEncoderMode == ATOM_ENCODER_MODE_DP) {
722 if (dp_link_clock_for_mode_clock(dig_connector->dpcd[1], 728 if (dig_connector->dp_clock == 270000)
723 radeon_encoder->pixel_clock) == 270000)
724 args.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ; 729 args.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ;
725 args.ucLaneNum = dp_lanes_for_mode_clock(dig_connector->dpcd[1], 730 args.ucLaneNum = dig_connector->dp_lane_count;
726 radeon_encoder->pixel_clock);
727 } else if (radeon_encoder->pixel_clock > 165000) 731 } else if (radeon_encoder->pixel_clock > 165000)
728 args.ucLaneNum = 8; 732 args.ucLaneNum = 8;
729 else 733 else
@@ -743,7 +747,7 @@ union dig_transmitter_control {
743 DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 v2; 747 DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 v2;
744}; 748};
745 749
746static void 750void
747atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t lane_num, uint8_t lane_set) 751atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t lane_num, uint8_t lane_set)
748{ 752{
749 struct drm_device *dev = encoder->dev; 753 struct drm_device *dev = encoder->dev;
@@ -803,8 +807,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
803 } else { 807 } else {
804 if (is_dp) 808 if (is_dp)
805 args.v1.usPixelClock = 809 args.v1.usPixelClock =
806 cpu_to_le16(dp_link_clock_for_mode_clock(dig_connector->dpcd[1], 810 cpu_to_le16(dig_connector->dp_clock / 10);
807 radeon_encoder->pixel_clock) / 10);
808 else if (radeon_encoder->pixel_clock > 165000) 811 else if (radeon_encoder->pixel_clock > 165000)
809 args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); 812 args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10);
810 else 813 else
@@ -1198,12 +1201,16 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
1198 struct radeon_device *rdev = dev->dev_private; 1201 struct radeon_device *rdev = dev->dev_private;
1199 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 1202 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1200 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); 1203 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
1204 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
1201 1205
1202 if (radeon_encoder->enc_priv) { 1206 if (radeon_encoder->active_device &
1203 struct radeon_encoder_atom_dig *dig; 1207 (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) {
1208 if (radeon_encoder->enc_priv) {
1209 struct radeon_encoder_atom_dig *dig;
1204 1210
1205 dig = radeon_encoder->enc_priv; 1211 dig = radeon_encoder->enc_priv;
1206 dig->dig_block = radeon_crtc->crtc_id; 1212 dig->dig_block = radeon_crtc->crtc_id;
1213 }
1207 } 1214 }
1208 radeon_encoder->pixel_clock = adjusted_mode->clock; 1215 radeon_encoder->pixel_clock = adjusted_mode->clock;
1209 1216
@@ -1237,6 +1244,7 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
1237 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT, 0, 0); 1244 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT, 0, 0);
1238 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0); 1245 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0);
1239 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0); 1246 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
1247 dp_link_train(encoder, connector);
1240 break; 1248 break;
1241 case ENCODER_OBJECT_ID_INTERNAL_DDI: 1249 case ENCODER_OBJECT_ID_INTERNAL_DDI:
1242 atombios_ddia_setup(encoder, ATOM_ENABLE); 1250 atombios_ddia_setup(encoder, ATOM_ENABLE);