diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-12-16 16:02:15 -0500 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-12-16 16:02:15 -0500 |
commit | d8c58fabd75021cdd99abcd96513cb088d41092b (patch) | |
tree | f6554ecfb27c0d50f5ae6acae3a7077282813cab /drivers/gpu/drm/radeon/radeon_device.c | |
parent | 9c04f015ebc2cc2cca5a4a576deb82a311578edc (diff) | |
parent | b08ebe7e776e5be0271ed1e1bbb384e1f29dd117 (diff) |
Merge remote branch 'airlied/drm-core-next' into drm-intel-next
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_device.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index e12e79326cb1..86660cb425ab 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -81,6 +81,7 @@ static const char radeon_family_name[][16] = { | |||
81 | "JUNIPER", | 81 | "JUNIPER", |
82 | "CYPRESS", | 82 | "CYPRESS", |
83 | "HEMLOCK", | 83 | "HEMLOCK", |
84 | "PALM", | ||
84 | "LAST", | 85 | "LAST", |
85 | }; | 86 | }; |
86 | 87 | ||
@@ -335,7 +336,12 @@ bool radeon_card_posted(struct radeon_device *rdev) | |||
335 | uint32_t reg; | 336 | uint32_t reg; |
336 | 337 | ||
337 | /* first check CRTCs */ | 338 | /* first check CRTCs */ |
338 | if (ASIC_IS_DCE4(rdev)) { | 339 | if (ASIC_IS_DCE41(rdev)) { |
340 | reg = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) | | ||
341 | RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET); | ||
342 | if (reg & EVERGREEN_CRTC_MASTER_EN) | ||
343 | return true; | ||
344 | } else if (ASIC_IS_DCE4(rdev)) { | ||
339 | reg = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) | | 345 | reg = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) | |
340 | RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET) | | 346 | RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET) | |
341 | RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET) | | 347 | RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET) | |