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authorAlex Deucher <alexander.deucher@amd.com>2014-10-01 09:43:38 -0400
committerAlex Deucher <alexander.deucher@amd.com>2015-03-19 12:26:39 -0400
commitff609975e1cd8a58ee862fb3188e8b01b935131d (patch)
tree1364c93781c44b813f2fc54970ac0f729f95e543 /drivers/gpu/drm/radeon/radeon_asic.c
parentc6d2ac2c36f80b8be15d47a8da6fca803a432e1c (diff)
drm/radeon: add get_allowed_info_register for EG/BTC
Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_asic.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index f2c343717c4b..0db4ee71fa69 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1344,6 +1344,7 @@ static struct radeon_asic evergreen_asic = {
1344 .mc_wait_for_idle = &evergreen_mc_wait_for_idle, 1344 .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
1345 .get_xclk = &rv770_get_xclk, 1345 .get_xclk = &rv770_get_xclk,
1346 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 1346 .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
1347 .get_allowed_info_register = evergreen_get_allowed_info_register,
1347 .gart = { 1348 .gart = {
1348 .tlb_flush = &evergreen_pcie_gart_tlb_flush, 1349 .tlb_flush = &evergreen_pcie_gart_tlb_flush,
1349 .get_page_entry = &rs600_gart_get_page_entry, 1350 .get_page_entry = &rs600_gart_get_page_entry,
@@ -1437,6 +1438,7 @@ static struct radeon_asic sumo_asic = {
1437 .mc_wait_for_idle = &evergreen_mc_wait_for_idle, 1438 .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
1438 .get_xclk = &r600_get_xclk, 1439 .get_xclk = &r600_get_xclk,
1439 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 1440 .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
1441 .get_allowed_info_register = evergreen_get_allowed_info_register,
1440 .gart = { 1442 .gart = {
1441 .tlb_flush = &evergreen_pcie_gart_tlb_flush, 1443 .tlb_flush = &evergreen_pcie_gart_tlb_flush,
1442 .get_page_entry = &rs600_gart_get_page_entry, 1444 .get_page_entry = &rs600_gart_get_page_entry,
@@ -1529,6 +1531,7 @@ static struct radeon_asic btc_asic = {
1529 .mc_wait_for_idle = &evergreen_mc_wait_for_idle, 1531 .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
1530 .get_xclk = &rv770_get_xclk, 1532 .get_xclk = &rv770_get_xclk,
1531 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 1533 .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
1534 .get_allowed_info_register = evergreen_get_allowed_info_register,
1532 .gart = { 1535 .gart = {
1533 .tlb_flush = &evergreen_pcie_gart_tlb_flush, 1536 .tlb_flush = &evergreen_pcie_gart_tlb_flush,
1534 .get_page_entry = &rs600_gart_get_page_entry, 1537 .get_page_entry = &rs600_gart_get_page_entry,