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authorAlex Deucher <alexander.deucher@amd.com>2012-02-23 17:53:39 -0500
committerDave Airlie <airlied@redhat.com>2012-02-27 09:49:04 -0500
commit901ea57dc4a2792900497172fa41358f9b2f67c3 (patch)
tree7a8b700cc579bc98a18d179f3534c5fc1727dc4c /drivers/gpu/drm/radeon/radeon_asic.c
parent89e5181f3f79fbe46dbf811f9bc470f524704450 (diff)
drm/radeon/kms: reorganize hpd callbacks
tidy up the radeon_asic struct. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_asic.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.c170
1 files changed, 102 insertions, 68 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index cc7187538363..b780edbf3af6 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -164,10 +164,12 @@ static struct radeon_asic r100_asic = {
164 .set_surface_reg = r100_set_surface_reg, 164 .set_surface_reg = r100_set_surface_reg,
165 .clear_surface_reg = r100_clear_surface_reg, 165 .clear_surface_reg = r100_clear_surface_reg,
166 .bandwidth_update = &r100_bandwidth_update, 166 .bandwidth_update = &r100_bandwidth_update,
167 .hpd_init = &r100_hpd_init, 167 .hpd = {
168 .hpd_fini = &r100_hpd_fini, 168 .init = &r100_hpd_init,
169 .hpd_sense = &r100_hpd_sense, 169 .fini = &r100_hpd_fini,
170 .hpd_set_polarity = &r100_hpd_set_polarity, 170 .sense = &r100_hpd_sense,
171 .set_polarity = &r100_hpd_set_polarity,
172 },
171 .ioctl_wait_idle = NULL, 173 .ioctl_wait_idle = NULL,
172 .gui_idle = &r100_gui_idle, 174 .gui_idle = &r100_gui_idle,
173 .pm_misc = &r100_pm_misc, 175 .pm_misc = &r100_pm_misc,
@@ -217,10 +219,12 @@ static struct radeon_asic r200_asic = {
217 .set_surface_reg = r100_set_surface_reg, 219 .set_surface_reg = r100_set_surface_reg,
218 .clear_surface_reg = r100_clear_surface_reg, 220 .clear_surface_reg = r100_clear_surface_reg,
219 .bandwidth_update = &r100_bandwidth_update, 221 .bandwidth_update = &r100_bandwidth_update,
220 .hpd_init = &r100_hpd_init, 222 .hpd = {
221 .hpd_fini = &r100_hpd_fini, 223 .init = &r100_hpd_init,
222 .hpd_sense = &r100_hpd_sense, 224 .fini = &r100_hpd_fini,
223 .hpd_set_polarity = &r100_hpd_set_polarity, 225 .sense = &r100_hpd_sense,
226 .set_polarity = &r100_hpd_set_polarity,
227 },
224 .ioctl_wait_idle = NULL, 228 .ioctl_wait_idle = NULL,
225 .gui_idle = &r100_gui_idle, 229 .gui_idle = &r100_gui_idle,
226 .pm_misc = &r100_pm_misc, 230 .pm_misc = &r100_pm_misc,
@@ -271,10 +275,12 @@ static struct radeon_asic r300_asic = {
271 .set_surface_reg = r100_set_surface_reg, 275 .set_surface_reg = r100_set_surface_reg,
272 .clear_surface_reg = r100_clear_surface_reg, 276 .clear_surface_reg = r100_clear_surface_reg,
273 .bandwidth_update = &r100_bandwidth_update, 277 .bandwidth_update = &r100_bandwidth_update,
274 .hpd_init = &r100_hpd_init, 278 .hpd = {
275 .hpd_fini = &r100_hpd_fini, 279 .init = &r100_hpd_init,
276 .hpd_sense = &r100_hpd_sense, 280 .fini = &r100_hpd_fini,
277 .hpd_set_polarity = &r100_hpd_set_polarity, 281 .sense = &r100_hpd_sense,
282 .set_polarity = &r100_hpd_set_polarity,
283 },
278 .ioctl_wait_idle = NULL, 284 .ioctl_wait_idle = NULL,
279 .gui_idle = &r100_gui_idle, 285 .gui_idle = &r100_gui_idle,
280 .pm_misc = &r100_pm_misc, 286 .pm_misc = &r100_pm_misc,
@@ -324,10 +330,12 @@ static struct radeon_asic r300_asic_pcie = {
324 .set_surface_reg = r100_set_surface_reg, 330 .set_surface_reg = r100_set_surface_reg,
325 .clear_surface_reg = r100_clear_surface_reg, 331 .clear_surface_reg = r100_clear_surface_reg,
326 .bandwidth_update = &r100_bandwidth_update, 332 .bandwidth_update = &r100_bandwidth_update,
327 .hpd_init = &r100_hpd_init, 333 .hpd = {
328 .hpd_fini = &r100_hpd_fini, 334 .init = &r100_hpd_init,
329 .hpd_sense = &r100_hpd_sense, 335 .fini = &r100_hpd_fini,
330 .hpd_set_polarity = &r100_hpd_set_polarity, 336 .sense = &r100_hpd_sense,
337 .set_polarity = &r100_hpd_set_polarity,
338 },
331 .ioctl_wait_idle = NULL, 339 .ioctl_wait_idle = NULL,
332 .gui_idle = &r100_gui_idle, 340 .gui_idle = &r100_gui_idle,
333 .pm_misc = &r100_pm_misc, 341 .pm_misc = &r100_pm_misc,
@@ -378,10 +386,12 @@ static struct radeon_asic r420_asic = {
378 .set_surface_reg = r100_set_surface_reg, 386 .set_surface_reg = r100_set_surface_reg,
379 .clear_surface_reg = r100_clear_surface_reg, 387 .clear_surface_reg = r100_clear_surface_reg,
380 .bandwidth_update = &r100_bandwidth_update, 388 .bandwidth_update = &r100_bandwidth_update,
381 .hpd_init = &r100_hpd_init, 389 .hpd = {
382 .hpd_fini = &r100_hpd_fini, 390 .init = &r100_hpd_init,
383 .hpd_sense = &r100_hpd_sense, 391 .fini = &r100_hpd_fini,
384 .hpd_set_polarity = &r100_hpd_set_polarity, 392 .sense = &r100_hpd_sense,
393 .set_polarity = &r100_hpd_set_polarity,
394 },
385 .ioctl_wait_idle = NULL, 395 .ioctl_wait_idle = NULL,
386 .gui_idle = &r100_gui_idle, 396 .gui_idle = &r100_gui_idle,
387 .pm_misc = &r100_pm_misc, 397 .pm_misc = &r100_pm_misc,
@@ -432,10 +442,12 @@ static struct radeon_asic rs400_asic = {
432 .set_surface_reg = r100_set_surface_reg, 442 .set_surface_reg = r100_set_surface_reg,
433 .clear_surface_reg = r100_clear_surface_reg, 443 .clear_surface_reg = r100_clear_surface_reg,
434 .bandwidth_update = &r100_bandwidth_update, 444 .bandwidth_update = &r100_bandwidth_update,
435 .hpd_init = &r100_hpd_init, 445 .hpd = {
436 .hpd_fini = &r100_hpd_fini, 446 .init = &r100_hpd_init,
437 .hpd_sense = &r100_hpd_sense, 447 .fini = &r100_hpd_fini,
438 .hpd_set_polarity = &r100_hpd_set_polarity, 448 .sense = &r100_hpd_sense,
449 .set_polarity = &r100_hpd_set_polarity,
450 },
439 .ioctl_wait_idle = NULL, 451 .ioctl_wait_idle = NULL,
440 .gui_idle = &r100_gui_idle, 452 .gui_idle = &r100_gui_idle,
441 .pm_misc = &r100_pm_misc, 453 .pm_misc = &r100_pm_misc,
@@ -486,10 +498,12 @@ static struct radeon_asic rs600_asic = {
486 .set_surface_reg = r100_set_surface_reg, 498 .set_surface_reg = r100_set_surface_reg,
487 .clear_surface_reg = r100_clear_surface_reg, 499 .clear_surface_reg = r100_clear_surface_reg,
488 .bandwidth_update = &rs600_bandwidth_update, 500 .bandwidth_update = &rs600_bandwidth_update,
489 .hpd_init = &rs600_hpd_init, 501 .hpd = {
490 .hpd_fini = &rs600_hpd_fini, 502 .init = &rs600_hpd_init,
491 .hpd_sense = &rs600_hpd_sense, 503 .fini = &rs600_hpd_fini,
492 .hpd_set_polarity = &rs600_hpd_set_polarity, 504 .sense = &rs600_hpd_sense,
505 .set_polarity = &rs600_hpd_set_polarity,
506 },
493 .ioctl_wait_idle = NULL, 507 .ioctl_wait_idle = NULL,
494 .gui_idle = &r100_gui_idle, 508 .gui_idle = &r100_gui_idle,
495 .pm_misc = &rs600_pm_misc, 509 .pm_misc = &rs600_pm_misc,
@@ -540,10 +554,12 @@ static struct radeon_asic rs690_asic = {
540 .set_surface_reg = r100_set_surface_reg, 554 .set_surface_reg = r100_set_surface_reg,
541 .clear_surface_reg = r100_clear_surface_reg, 555 .clear_surface_reg = r100_clear_surface_reg,
542 .bandwidth_update = &rs690_bandwidth_update, 556 .bandwidth_update = &rs690_bandwidth_update,
543 .hpd_init = &rs600_hpd_init, 557 .hpd = {
544 .hpd_fini = &rs600_hpd_fini, 558 .init = &rs600_hpd_init,
545 .hpd_sense = &rs600_hpd_sense, 559 .fini = &rs600_hpd_fini,
546 .hpd_set_polarity = &rs600_hpd_set_polarity, 560 .sense = &rs600_hpd_sense,
561 .set_polarity = &rs600_hpd_set_polarity,
562 },
547 .ioctl_wait_idle = NULL, 563 .ioctl_wait_idle = NULL,
548 .gui_idle = &r100_gui_idle, 564 .gui_idle = &r100_gui_idle,
549 .pm_misc = &rs600_pm_misc, 565 .pm_misc = &rs600_pm_misc,
@@ -594,10 +610,12 @@ static struct radeon_asic rv515_asic = {
594 .set_surface_reg = r100_set_surface_reg, 610 .set_surface_reg = r100_set_surface_reg,
595 .clear_surface_reg = r100_clear_surface_reg, 611 .clear_surface_reg = r100_clear_surface_reg,
596 .bandwidth_update = &rv515_bandwidth_update, 612 .bandwidth_update = &rv515_bandwidth_update,
597 .hpd_init = &rs600_hpd_init, 613 .hpd = {
598 .hpd_fini = &rs600_hpd_fini, 614 .init = &rs600_hpd_init,
599 .hpd_sense = &rs600_hpd_sense, 615 .fini = &rs600_hpd_fini,
600 .hpd_set_polarity = &rs600_hpd_set_polarity, 616 .sense = &rs600_hpd_sense,
617 .set_polarity = &rs600_hpd_set_polarity,
618 },
601 .ioctl_wait_idle = NULL, 619 .ioctl_wait_idle = NULL,
602 .gui_idle = &r100_gui_idle, 620 .gui_idle = &r100_gui_idle,
603 .pm_misc = &rs600_pm_misc, 621 .pm_misc = &rs600_pm_misc,
@@ -648,10 +666,12 @@ static struct radeon_asic r520_asic = {
648 .set_surface_reg = r100_set_surface_reg, 666 .set_surface_reg = r100_set_surface_reg,
649 .clear_surface_reg = r100_clear_surface_reg, 667 .clear_surface_reg = r100_clear_surface_reg,
650 .bandwidth_update = &rv515_bandwidth_update, 668 .bandwidth_update = &rv515_bandwidth_update,
651 .hpd_init = &rs600_hpd_init, 669 .hpd = {
652 .hpd_fini = &rs600_hpd_fini, 670 .init = &rs600_hpd_init,
653 .hpd_sense = &rs600_hpd_sense, 671 .fini = &rs600_hpd_fini,
654 .hpd_set_polarity = &rs600_hpd_set_polarity, 672 .sense = &rs600_hpd_sense,
673 .set_polarity = &rs600_hpd_set_polarity,
674 },
655 .ioctl_wait_idle = NULL, 675 .ioctl_wait_idle = NULL,
656 .gui_idle = &r100_gui_idle, 676 .gui_idle = &r100_gui_idle,
657 .pm_misc = &rs600_pm_misc, 677 .pm_misc = &rs600_pm_misc,
@@ -701,10 +721,12 @@ static struct radeon_asic r600_asic = {
701 .set_surface_reg = r600_set_surface_reg, 721 .set_surface_reg = r600_set_surface_reg,
702 .clear_surface_reg = r600_clear_surface_reg, 722 .clear_surface_reg = r600_clear_surface_reg,
703 .bandwidth_update = &rv515_bandwidth_update, 723 .bandwidth_update = &rv515_bandwidth_update,
704 .hpd_init = &r600_hpd_init, 724 .hpd = {
705 .hpd_fini = &r600_hpd_fini, 725 .init = &r600_hpd_init,
706 .hpd_sense = &r600_hpd_sense, 726 .fini = &r600_hpd_fini,
707 .hpd_set_polarity = &r600_hpd_set_polarity, 727 .sense = &r600_hpd_sense,
728 .set_polarity = &r600_hpd_set_polarity,
729 },
708 .ioctl_wait_idle = r600_ioctl_wait_idle, 730 .ioctl_wait_idle = r600_ioctl_wait_idle,
709 .gui_idle = &r600_gui_idle, 731 .gui_idle = &r600_gui_idle,
710 .pm_misc = &r600_pm_misc, 732 .pm_misc = &r600_pm_misc,
@@ -754,10 +776,12 @@ static struct radeon_asic rs780_asic = {
754 .set_surface_reg = r600_set_surface_reg, 776 .set_surface_reg = r600_set_surface_reg,
755 .clear_surface_reg = r600_clear_surface_reg, 777 .clear_surface_reg = r600_clear_surface_reg,
756 .bandwidth_update = &rs690_bandwidth_update, 778 .bandwidth_update = &rs690_bandwidth_update,
757 .hpd_init = &r600_hpd_init, 779 .hpd = {
758 .hpd_fini = &r600_hpd_fini, 780 .init = &r600_hpd_init,
759 .hpd_sense = &r600_hpd_sense, 781 .fini = &r600_hpd_fini,
760 .hpd_set_polarity = &r600_hpd_set_polarity, 782 .sense = &r600_hpd_sense,
783 .set_polarity = &r600_hpd_set_polarity,
784 },
761 .ioctl_wait_idle = r600_ioctl_wait_idle, 785 .ioctl_wait_idle = r600_ioctl_wait_idle,
762 .gui_idle = &r600_gui_idle, 786 .gui_idle = &r600_gui_idle,
763 .pm_misc = &r600_pm_misc, 787 .pm_misc = &r600_pm_misc,
@@ -807,10 +831,12 @@ static struct radeon_asic rv770_asic = {
807 .set_surface_reg = r600_set_surface_reg, 831 .set_surface_reg = r600_set_surface_reg,
808 .clear_surface_reg = r600_clear_surface_reg, 832 .clear_surface_reg = r600_clear_surface_reg,
809 .bandwidth_update = &rv515_bandwidth_update, 833 .bandwidth_update = &rv515_bandwidth_update,
810 .hpd_init = &r600_hpd_init, 834 .hpd = {
811 .hpd_fini = &r600_hpd_fini, 835 .init = &r600_hpd_init,
812 .hpd_sense = &r600_hpd_sense, 836 .fini = &r600_hpd_fini,
813 .hpd_set_polarity = &r600_hpd_set_polarity, 837 .sense = &r600_hpd_sense,
838 .set_polarity = &r600_hpd_set_polarity,
839 },
814 .ioctl_wait_idle = r600_ioctl_wait_idle, 840 .ioctl_wait_idle = r600_ioctl_wait_idle,
815 .gui_idle = &r600_gui_idle, 841 .gui_idle = &r600_gui_idle,
816 .pm_misc = &rv770_pm_misc, 842 .pm_misc = &rv770_pm_misc,
@@ -860,10 +886,12 @@ static struct radeon_asic evergreen_asic = {
860 .set_surface_reg = r600_set_surface_reg, 886 .set_surface_reg = r600_set_surface_reg,
861 .clear_surface_reg = r600_clear_surface_reg, 887 .clear_surface_reg = r600_clear_surface_reg,
862 .bandwidth_update = &evergreen_bandwidth_update, 888 .bandwidth_update = &evergreen_bandwidth_update,
863 .hpd_init = &evergreen_hpd_init, 889 .hpd = {
864 .hpd_fini = &evergreen_hpd_fini, 890 .init = &evergreen_hpd_init,
865 .hpd_sense = &evergreen_hpd_sense, 891 .fini = &evergreen_hpd_fini,
866 .hpd_set_polarity = &evergreen_hpd_set_polarity, 892 .sense = &evergreen_hpd_sense,
893 .set_polarity = &evergreen_hpd_set_polarity,
894 },
867 .ioctl_wait_idle = r600_ioctl_wait_idle, 895 .ioctl_wait_idle = r600_ioctl_wait_idle,
868 .gui_idle = &r600_gui_idle, 896 .gui_idle = &r600_gui_idle,
869 .pm_misc = &evergreen_pm_misc, 897 .pm_misc = &evergreen_pm_misc,
@@ -913,10 +941,12 @@ static struct radeon_asic sumo_asic = {
913 .set_surface_reg = r600_set_surface_reg, 941 .set_surface_reg = r600_set_surface_reg,
914 .clear_surface_reg = r600_clear_surface_reg, 942 .clear_surface_reg = r600_clear_surface_reg,
915 .bandwidth_update = &evergreen_bandwidth_update, 943 .bandwidth_update = &evergreen_bandwidth_update,
916 .hpd_init = &evergreen_hpd_init, 944 .hpd = {
917 .hpd_fini = &evergreen_hpd_fini, 945 .init = &evergreen_hpd_init,
918 .hpd_sense = &evergreen_hpd_sense, 946 .fini = &evergreen_hpd_fini,
919 .hpd_set_polarity = &evergreen_hpd_set_polarity, 947 .sense = &evergreen_hpd_sense,
948 .set_polarity = &evergreen_hpd_set_polarity,
949 },
920 .ioctl_wait_idle = r600_ioctl_wait_idle, 950 .ioctl_wait_idle = r600_ioctl_wait_idle,
921 .gui_idle = &r600_gui_idle, 951 .gui_idle = &r600_gui_idle,
922 .pm_misc = &evergreen_pm_misc, 952 .pm_misc = &evergreen_pm_misc,
@@ -966,10 +996,12 @@ static struct radeon_asic btc_asic = {
966 .set_surface_reg = r600_set_surface_reg, 996 .set_surface_reg = r600_set_surface_reg,
967 .clear_surface_reg = r600_clear_surface_reg, 997 .clear_surface_reg = r600_clear_surface_reg,
968 .bandwidth_update = &evergreen_bandwidth_update, 998 .bandwidth_update = &evergreen_bandwidth_update,
969 .hpd_init = &evergreen_hpd_init, 999 .hpd = {
970 .hpd_fini = &evergreen_hpd_fini, 1000 .init = &evergreen_hpd_init,
971 .hpd_sense = &evergreen_hpd_sense, 1001 .fini = &evergreen_hpd_fini,
972 .hpd_set_polarity = &evergreen_hpd_set_polarity, 1002 .sense = &evergreen_hpd_sense,
1003 .set_polarity = &evergreen_hpd_set_polarity,
1004 },
973 .ioctl_wait_idle = r600_ioctl_wait_idle, 1005 .ioctl_wait_idle = r600_ioctl_wait_idle,
974 .gui_idle = &r600_gui_idle, 1006 .gui_idle = &r600_gui_idle,
975 .pm_misc = &evergreen_pm_misc, 1007 .pm_misc = &evergreen_pm_misc,
@@ -1042,10 +1074,12 @@ static struct radeon_asic cayman_asic = {
1042 .set_surface_reg = r600_set_surface_reg, 1074 .set_surface_reg = r600_set_surface_reg,
1043 .clear_surface_reg = r600_clear_surface_reg, 1075 .clear_surface_reg = r600_clear_surface_reg,
1044 .bandwidth_update = &evergreen_bandwidth_update, 1076 .bandwidth_update = &evergreen_bandwidth_update,
1045 .hpd_init = &evergreen_hpd_init, 1077 .hpd = {
1046 .hpd_fini = &evergreen_hpd_fini, 1078 .init = &evergreen_hpd_init,
1047 .hpd_sense = &evergreen_hpd_sense, 1079 .fini = &evergreen_hpd_fini,
1048 .hpd_set_polarity = &evergreen_hpd_set_polarity, 1080 .sense = &evergreen_hpd_sense,
1081 .set_polarity = &evergreen_hpd_set_polarity,
1082 },
1049 .ioctl_wait_idle = r600_ioctl_wait_idle, 1083 .ioctl_wait_idle = r600_ioctl_wait_idle,
1050 .gui_idle = &r600_gui_idle, 1084 .gui_idle = &r600_gui_idle,
1051 .pm_misc = &evergreen_pm_misc, 1085 .pm_misc = &evergreen_pm_misc,