diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2013-08-14 18:53:56 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2013-08-30 16:30:52 -0400 |
| commit | 090f4b6ad38eec0c24dcdc9d01cc22077c3b9d22 (patch) | |
| tree | d87ce068b466586c4defad81c870483f29aa9f1a /drivers/gpu/drm/radeon/radeon_asic.c | |
| parent | 4cb0add259179ca8634fc0fddb2274534a58ff2d (diff) | |
drm/radeon: enable mgcg on SI
Now that the CP is no longer reset and cg is properly
disabled in when appropriate in the dpm code we can
now enable mgcg (medium grained clockgating).
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_asic.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 52fe0d4eeaa0..3bd96cdb7601 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
| @@ -2338,7 +2338,7 @@ int radeon_asic_init(struct radeon_device *rdev) | |||
| 2338 | switch (rdev->family) { | 2338 | switch (rdev->family) { |
| 2339 | case CHIP_TAHITI: | 2339 | case CHIP_TAHITI: |
| 2340 | rdev->cg_flags = | 2340 | rdev->cg_flags = |
| 2341 | /*RADEON_CG_SUPPORT_GFX_MGCG |*/ | 2341 | RADEON_CG_SUPPORT_GFX_MGCG | |
| 2342 | RADEON_CG_SUPPORT_GFX_MGLS | | 2342 | RADEON_CG_SUPPORT_GFX_MGLS | |
| 2343 | /*RADEON_CG_SUPPORT_GFX_CGCG |*/ | 2343 | /*RADEON_CG_SUPPORT_GFX_CGCG |*/ |
| 2344 | RADEON_CG_SUPPORT_GFX_CGLS | | 2344 | RADEON_CG_SUPPORT_GFX_CGLS | |
| @@ -2355,7 +2355,7 @@ int radeon_asic_init(struct radeon_device *rdev) | |||
| 2355 | break; | 2355 | break; |
| 2356 | case CHIP_PITCAIRN: | 2356 | case CHIP_PITCAIRN: |
| 2357 | rdev->cg_flags = | 2357 | rdev->cg_flags = |
| 2358 | /*RADEON_CG_SUPPORT_GFX_MGCG |*/ | 2358 | RADEON_CG_SUPPORT_GFX_MGCG | |
| 2359 | RADEON_CG_SUPPORT_GFX_MGLS | | 2359 | RADEON_CG_SUPPORT_GFX_MGLS | |
| 2360 | /*RADEON_CG_SUPPORT_GFX_CGCG |*/ | 2360 | /*RADEON_CG_SUPPORT_GFX_CGCG |*/ |
| 2361 | RADEON_CG_SUPPORT_GFX_CGLS | | 2361 | RADEON_CG_SUPPORT_GFX_CGLS | |
| @@ -2374,7 +2374,7 @@ int radeon_asic_init(struct radeon_device *rdev) | |||
| 2374 | break; | 2374 | break; |
| 2375 | case CHIP_VERDE: | 2375 | case CHIP_VERDE: |
| 2376 | rdev->cg_flags = | 2376 | rdev->cg_flags = |
| 2377 | /*RADEON_CG_SUPPORT_GFX_MGCG |*/ | 2377 | RADEON_CG_SUPPORT_GFX_MGCG | |
| 2378 | RADEON_CG_SUPPORT_GFX_MGLS | | 2378 | RADEON_CG_SUPPORT_GFX_MGLS | |
| 2379 | /*RADEON_CG_SUPPORT_GFX_CGCG |*/ | 2379 | /*RADEON_CG_SUPPORT_GFX_CGCG |*/ |
| 2380 | RADEON_CG_SUPPORT_GFX_CGLS | | 2380 | RADEON_CG_SUPPORT_GFX_CGLS | |
| @@ -2395,7 +2395,7 @@ int radeon_asic_init(struct radeon_device *rdev) | |||
| 2395 | break; | 2395 | break; |
| 2396 | case CHIP_OLAND: | 2396 | case CHIP_OLAND: |
| 2397 | rdev->cg_flags = | 2397 | rdev->cg_flags = |
| 2398 | /*RADEON_CG_SUPPORT_GFX_MGCG |*/ | 2398 | RADEON_CG_SUPPORT_GFX_MGCG | |
| 2399 | RADEON_CG_SUPPORT_GFX_MGLS | | 2399 | RADEON_CG_SUPPORT_GFX_MGLS | |
| 2400 | /*RADEON_CG_SUPPORT_GFX_CGCG |*/ | 2400 | /*RADEON_CG_SUPPORT_GFX_CGCG |*/ |
| 2401 | RADEON_CG_SUPPORT_GFX_CGLS | | 2401 | RADEON_CG_SUPPORT_GFX_CGLS | |
| @@ -2413,7 +2413,7 @@ int radeon_asic_init(struct radeon_device *rdev) | |||
| 2413 | break; | 2413 | break; |
| 2414 | case CHIP_HAINAN: | 2414 | case CHIP_HAINAN: |
| 2415 | rdev->cg_flags = | 2415 | rdev->cg_flags = |
| 2416 | /*RADEON_CG_SUPPORT_GFX_MGCG |*/ | 2416 | RADEON_CG_SUPPORT_GFX_MGCG | |
| 2417 | RADEON_CG_SUPPORT_GFX_MGLS | | 2417 | RADEON_CG_SUPPORT_GFX_MGLS | |
| 2418 | /*RADEON_CG_SUPPORT_GFX_CGCG |*/ | 2418 | /*RADEON_CG_SUPPORT_GFX_CGCG |*/ |
| 2419 | RADEON_CG_SUPPORT_GFX_CGLS | | 2419 | RADEON_CG_SUPPORT_GFX_CGLS | |