diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-04 02:29:23 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-04 02:29:23 -0400 |
commit | 612a9aab56a93533e76e3ad91642db7033e03b69 (patch) | |
tree | 8402096973f67af941f9392f7da06cca03e0b58a /drivers/gpu/drm/radeon/radeon.h | |
parent | 3a494318b14b1bc0f59d2d6ce84c505c74d82d2a (diff) | |
parent | 268d28371cd326be4dfcd7eba5917bf4b9d30c8f (diff) |
Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm merge (part 1) from Dave Airlie:
"So first of all my tree and uapi stuff has a conflict mess, its my
fault as the nouveau stuff didn't hit -next as were trying to rebase
regressions out of it before we merged.
Highlights:
- SH mobile modesetting driver and associated helpers
- some DRM core documentation
- i915 modesetting rework, haswell hdmi, haswell and vlv fixes, write
combined pte writing, ilk rc6 support,
- nouveau: major driver rework into a hw core driver, makes features
like SLI a lot saner to implement,
- psb: add eDP/DP support for Cedarview
- radeon: 2 layer page tables, async VM pte updates, better PLL
selection for > 2 screens, better ACPI interactions
The rest is general grab bag of fixes.
So why part 1? well I have the exynos pull req which came in a bit
late but was waiting for me to do something they shouldn't have and it
looks fairly safe, and David Howells has some more header cleanups
he'd like me to pull, that seem like a good idea, but I'd like to get
this merge out of the way so -next dosen't get blocked."
Tons of conflicts mostly due to silly include line changes, but mostly
mindless. A few other small semantic conflicts too, noted from Dave's
pre-merged branch.
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (447 commits)
drm/nv98/crypt: fix fuc build with latest envyas
drm/nouveau/devinit: fixup various issues with subdev ctor/init ordering
drm/nv41/vm: fix and enable use of "real" pciegart
drm/nv44/vm: fix and enable use of "real" pciegart
drm/nv04/dmaobj: fixup vm target handling in preparation for nv4x pcie
drm/nouveau: store supported dma mask in vmmgr
drm/nvc0/ibus: initial implementation of subdev
drm/nouveau/therm: add support for fan-control modes
drm/nouveau/hwmon: rename pwm0* to pmw1* to follow hwmon's rules
drm/nouveau/therm: calculate the pwm divisor on nv50+
drm/nouveau/fan: rewrite the fan tachometer driver to get more precision, faster
drm/nouveau/therm: move thermal-related functions to the therm subdev
drm/nouveau/bios: parse the pwm divisor from the perf table
drm/nouveau/therm: use the EXTDEV table to detect i2c monitoring devices
drm/nouveau/therm: rework thermal table parsing
drm/nouveau/gpio: expose the PWM/TOGGLE parameter found in the gpio vbios table
drm/nouveau: fix pm initialization order
drm/nouveau/bios: check that fixed tvdac gpio data is valid before using it
drm/nouveau: log channel debug/error messages from client object rather than drm client
drm/nouveau: have drm debugging macros build on top of core macros
...
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 192 |
1 files changed, 144 insertions, 48 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 59a15315ae9f..b04c06444d8b 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -123,6 +123,7 @@ extern int radeon_lockup_timeout; | |||
123 | #define CAYMAN_RING_TYPE_CP2_INDEX 2 | 123 | #define CAYMAN_RING_TYPE_CP2_INDEX 2 |
124 | 124 | ||
125 | /* hardcode those limit for now */ | 125 | /* hardcode those limit for now */ |
126 | #define RADEON_VA_IB_OFFSET (1 << 20) | ||
126 | #define RADEON_VA_RESERVED_SIZE (8 << 20) | 127 | #define RADEON_VA_RESERVED_SIZE (8 << 20) |
127 | #define RADEON_IB_VM_MAX_SIZE (64 << 10) | 128 | #define RADEON_IB_VM_MAX_SIZE (64 << 10) |
128 | 129 | ||
@@ -253,6 +254,22 @@ static inline struct radeon_fence *radeon_fence_later(struct radeon_fence *a, | |||
253 | } | 254 | } |
254 | } | 255 | } |
255 | 256 | ||
257 | static inline bool radeon_fence_is_earlier(struct radeon_fence *a, | ||
258 | struct radeon_fence *b) | ||
259 | { | ||
260 | if (!a) { | ||
261 | return false; | ||
262 | } | ||
263 | |||
264 | if (!b) { | ||
265 | return true; | ||
266 | } | ||
267 | |||
268 | BUG_ON(a->ring != b->ring); | ||
269 | |||
270 | return a->seq < b->seq; | ||
271 | } | ||
272 | |||
256 | /* | 273 | /* |
257 | * Tiling registers | 274 | * Tiling registers |
258 | */ | 275 | */ |
@@ -275,18 +292,20 @@ struct radeon_mman { | |||
275 | 292 | ||
276 | /* bo virtual address in a specific vm */ | 293 | /* bo virtual address in a specific vm */ |
277 | struct radeon_bo_va { | 294 | struct radeon_bo_va { |
278 | /* bo list is protected by bo being reserved */ | 295 | /* protected by bo being reserved */ |
279 | struct list_head bo_list; | 296 | struct list_head bo_list; |
280 | /* vm list is protected by vm mutex */ | ||
281 | struct list_head vm_list; | ||
282 | /* constant after initialization */ | ||
283 | struct radeon_vm *vm; | ||
284 | struct radeon_bo *bo; | ||
285 | uint64_t soffset; | 297 | uint64_t soffset; |
286 | uint64_t eoffset; | 298 | uint64_t eoffset; |
287 | uint32_t flags; | 299 | uint32_t flags; |
288 | struct radeon_fence *fence; | ||
289 | bool valid; | 300 | bool valid; |
301 | unsigned ref_count; | ||
302 | |||
303 | /* protected by vm mutex */ | ||
304 | struct list_head vm_list; | ||
305 | |||
306 | /* constant after initialization */ | ||
307 | struct radeon_vm *vm; | ||
308 | struct radeon_bo *bo; | ||
290 | }; | 309 | }; |
291 | 310 | ||
292 | struct radeon_bo { | 311 | struct radeon_bo { |
@@ -566,9 +585,6 @@ struct radeon_irq { | |||
566 | atomic_t pflip[RADEON_MAX_CRTCS]; | 585 | atomic_t pflip[RADEON_MAX_CRTCS]; |
567 | wait_queue_head_t vblank_queue; | 586 | wait_queue_head_t vblank_queue; |
568 | bool hpd[RADEON_MAX_HPD_PINS]; | 587 | bool hpd[RADEON_MAX_HPD_PINS]; |
569 | bool gui_idle; | ||
570 | bool gui_idle_acked; | ||
571 | wait_queue_head_t idle_queue; | ||
572 | bool afmt[RADEON_MAX_AFMT_BLOCKS]; | 588 | bool afmt[RADEON_MAX_AFMT_BLOCKS]; |
573 | union radeon_irq_stat_regs stat_regs; | 589 | union radeon_irq_stat_regs stat_regs; |
574 | }; | 590 | }; |
@@ -583,7 +599,6 @@ void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block); | |||
583 | void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block); | 599 | void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block); |
584 | void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask); | 600 | void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask); |
585 | void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask); | 601 | void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask); |
586 | int radeon_irq_kms_wait_gui_idle(struct radeon_device *rdev); | ||
587 | 602 | ||
588 | /* | 603 | /* |
589 | * CP & rings. | 604 | * CP & rings. |
@@ -596,7 +611,7 @@ struct radeon_ib { | |||
596 | uint32_t *ptr; | 611 | uint32_t *ptr; |
597 | int ring; | 612 | int ring; |
598 | struct radeon_fence *fence; | 613 | struct radeon_fence *fence; |
599 | unsigned vm_id; | 614 | struct radeon_vm *vm; |
600 | bool is_const_ib; | 615 | bool is_const_ib; |
601 | struct radeon_fence *sync_to[RADEON_NUM_RINGS]; | 616 | struct radeon_fence *sync_to[RADEON_NUM_RINGS]; |
602 | struct radeon_semaphore *semaphore; | 617 | struct radeon_semaphore *semaphore; |
@@ -632,41 +647,38 @@ struct radeon_ring { | |||
632 | /* | 647 | /* |
633 | * VM | 648 | * VM |
634 | */ | 649 | */ |
650 | |||
651 | /* maximum number of VMIDs */ | ||
652 | #define RADEON_NUM_VM 16 | ||
653 | |||
654 | /* defines number of bits in page table versus page directory, | ||
655 | * a page is 4KB so we have 12 bits offset, 9 bits in the page | ||
656 | * table and the remaining 19 bits are in the page directory */ | ||
657 | #define RADEON_VM_BLOCK_SIZE 9 | ||
658 | |||
659 | /* number of entries in page table */ | ||
660 | #define RADEON_VM_PTE_COUNT (1 << RADEON_VM_BLOCK_SIZE) | ||
661 | |||
635 | struct radeon_vm { | 662 | struct radeon_vm { |
636 | struct list_head list; | 663 | struct list_head list; |
637 | struct list_head va; | 664 | struct list_head va; |
638 | int id; | 665 | unsigned id; |
639 | unsigned last_pfn; | 666 | unsigned last_pfn; |
640 | u64 pt_gpu_addr; | 667 | u64 pd_gpu_addr; |
641 | u64 *pt; | ||
642 | struct radeon_sa_bo *sa_bo; | 668 | struct radeon_sa_bo *sa_bo; |
643 | struct mutex mutex; | 669 | struct mutex mutex; |
644 | /* last fence for cs using this vm */ | 670 | /* last fence for cs using this vm */ |
645 | struct radeon_fence *fence; | 671 | struct radeon_fence *fence; |
646 | }; | 672 | /* last flush or NULL if we still need to flush */ |
647 | 673 | struct radeon_fence *last_flush; | |
648 | struct radeon_vm_funcs { | ||
649 | int (*init)(struct radeon_device *rdev); | ||
650 | void (*fini)(struct radeon_device *rdev); | ||
651 | /* cs mutex must be lock for schedule_ib */ | ||
652 | int (*bind)(struct radeon_device *rdev, struct radeon_vm *vm, int id); | ||
653 | void (*unbind)(struct radeon_device *rdev, struct radeon_vm *vm); | ||
654 | void (*tlb_flush)(struct radeon_device *rdev, struct radeon_vm *vm); | ||
655 | uint32_t (*page_flags)(struct radeon_device *rdev, | ||
656 | struct radeon_vm *vm, | ||
657 | uint32_t flags); | ||
658 | void (*set_page)(struct radeon_device *rdev, struct radeon_vm *vm, | ||
659 | unsigned pfn, uint64_t addr, uint32_t flags); | ||
660 | }; | 674 | }; |
661 | 675 | ||
662 | struct radeon_vm_manager { | 676 | struct radeon_vm_manager { |
663 | struct mutex lock; | 677 | struct mutex lock; |
664 | struct list_head lru_vm; | 678 | struct list_head lru_vm; |
665 | uint32_t use_bitmap; | 679 | struct radeon_fence *active[RADEON_NUM_VM]; |
666 | struct radeon_sa_manager sa_manager; | 680 | struct radeon_sa_manager sa_manager; |
667 | uint32_t max_pfn; | 681 | uint32_t max_pfn; |
668 | /* fields constant after init */ | ||
669 | const struct radeon_vm_funcs *funcs; | ||
670 | /* number of VMIDs */ | 682 | /* number of VMIDs */ |
671 | unsigned nvm; | 683 | unsigned nvm; |
672 | /* vram base address for page table entry */ | 684 | /* vram base address for page table entry */ |
@@ -738,7 +750,8 @@ struct si_rlc { | |||
738 | }; | 750 | }; |
739 | 751 | ||
740 | int radeon_ib_get(struct radeon_device *rdev, int ring, | 752 | int radeon_ib_get(struct radeon_device *rdev, int ring, |
741 | struct radeon_ib *ib, unsigned size); | 753 | struct radeon_ib *ib, struct radeon_vm *vm, |
754 | unsigned size); | ||
742 | void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib); | 755 | void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib); |
743 | int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, | 756 | int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, |
744 | struct radeon_ib *const_ib); | 757 | struct radeon_ib *const_ib); |
@@ -1131,6 +1144,15 @@ struct radeon_asic { | |||
1131 | void (*tlb_flush)(struct radeon_device *rdev); | 1144 | void (*tlb_flush)(struct radeon_device *rdev); |
1132 | int (*set_page)(struct radeon_device *rdev, int i, uint64_t addr); | 1145 | int (*set_page)(struct radeon_device *rdev, int i, uint64_t addr); |
1133 | } gart; | 1146 | } gart; |
1147 | struct { | ||
1148 | int (*init)(struct radeon_device *rdev); | ||
1149 | void (*fini)(struct radeon_device *rdev); | ||
1150 | |||
1151 | u32 pt_ring_index; | ||
1152 | void (*set_page)(struct radeon_device *rdev, uint64_t pe, | ||
1153 | uint64_t addr, unsigned count, | ||
1154 | uint32_t incr, uint32_t flags); | ||
1155 | } vm; | ||
1134 | /* ring specific callbacks */ | 1156 | /* ring specific callbacks */ |
1135 | struct { | 1157 | struct { |
1136 | void (*ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib); | 1158 | void (*ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib); |
@@ -1143,6 +1165,7 @@ struct radeon_asic { | |||
1143 | int (*ring_test)(struct radeon_device *rdev, struct radeon_ring *cp); | 1165 | int (*ring_test)(struct radeon_device *rdev, struct radeon_ring *cp); |
1144 | int (*ib_test)(struct radeon_device *rdev, struct radeon_ring *cp); | 1166 | int (*ib_test)(struct radeon_device *rdev, struct radeon_ring *cp); |
1145 | bool (*is_lockup)(struct radeon_device *rdev, struct radeon_ring *cp); | 1167 | bool (*is_lockup)(struct radeon_device *rdev, struct radeon_ring *cp); |
1168 | void (*vm_flush)(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); | ||
1146 | } ring[RADEON_NUM_RINGS]; | 1169 | } ring[RADEON_NUM_RINGS]; |
1147 | /* irqs */ | 1170 | /* irqs */ |
1148 | struct { | 1171 | struct { |
@@ -1157,6 +1180,10 @@ struct radeon_asic { | |||
1157 | u32 (*get_vblank_counter)(struct radeon_device *rdev, int crtc); | 1180 | u32 (*get_vblank_counter)(struct radeon_device *rdev, int crtc); |
1158 | /* wait for vblank */ | 1181 | /* wait for vblank */ |
1159 | void (*wait_for_vblank)(struct radeon_device *rdev, int crtc); | 1182 | void (*wait_for_vblank)(struct radeon_device *rdev, int crtc); |
1183 | /* set backlight level */ | ||
1184 | void (*set_backlight_level)(struct radeon_encoder *radeon_encoder, u8 level); | ||
1185 | /* get backlight level */ | ||
1186 | u8 (*get_backlight_level)(struct radeon_encoder *radeon_encoder); | ||
1160 | } display; | 1187 | } display; |
1161 | /* copy functions for bo handling */ | 1188 | /* copy functions for bo handling */ |
1162 | struct { | 1189 | struct { |
@@ -1428,6 +1455,56 @@ struct r600_vram_scratch { | |||
1428 | u64 gpu_addr; | 1455 | u64 gpu_addr; |
1429 | }; | 1456 | }; |
1430 | 1457 | ||
1458 | /* | ||
1459 | * ACPI | ||
1460 | */ | ||
1461 | struct radeon_atif_notification_cfg { | ||
1462 | bool enabled; | ||
1463 | int command_code; | ||
1464 | }; | ||
1465 | |||
1466 | struct radeon_atif_notifications { | ||
1467 | bool display_switch; | ||
1468 | bool expansion_mode_change; | ||
1469 | bool thermal_state; | ||
1470 | bool forced_power_state; | ||
1471 | bool system_power_state; | ||
1472 | bool display_conf_change; | ||
1473 | bool px_gfx_switch; | ||
1474 | bool brightness_change; | ||
1475 | bool dgpu_display_event; | ||
1476 | }; | ||
1477 | |||
1478 | struct radeon_atif_functions { | ||
1479 | bool system_params; | ||
1480 | bool sbios_requests; | ||
1481 | bool select_active_disp; | ||
1482 | bool lid_state; | ||
1483 | bool get_tv_standard; | ||
1484 | bool set_tv_standard; | ||
1485 | bool get_panel_expansion_mode; | ||
1486 | bool set_panel_expansion_mode; | ||
1487 | bool temperature_change; | ||
1488 | bool graphics_device_types; | ||
1489 | }; | ||
1490 | |||
1491 | struct radeon_atif { | ||
1492 | struct radeon_atif_notifications notifications; | ||
1493 | struct radeon_atif_functions functions; | ||
1494 | struct radeon_atif_notification_cfg notification_cfg; | ||
1495 | struct radeon_encoder *encoder_for_bl; | ||
1496 | }; | ||
1497 | |||
1498 | struct radeon_atcs_functions { | ||
1499 | bool get_ext_state; | ||
1500 | bool pcie_perf_req; | ||
1501 | bool pcie_dev_rdy; | ||
1502 | bool pcie_bus_width; | ||
1503 | }; | ||
1504 | |||
1505 | struct radeon_atcs { | ||
1506 | struct radeon_atcs_functions functions; | ||
1507 | }; | ||
1431 | 1508 | ||
1432 | /* | 1509 | /* |
1433 | * Core structure, functions and helpers. | 1510 | * Core structure, functions and helpers. |
@@ -1520,6 +1597,9 @@ struct radeon_device { | |||
1520 | /* virtual memory */ | 1597 | /* virtual memory */ |
1521 | struct radeon_vm_manager vm_manager; | 1598 | struct radeon_vm_manager vm_manager; |
1522 | struct mutex gpu_clock_mutex; | 1599 | struct mutex gpu_clock_mutex; |
1600 | /* ACPI interface */ | ||
1601 | struct radeon_atif atif; | ||
1602 | struct radeon_atcs atcs; | ||
1523 | }; | 1603 | }; |
1524 | 1604 | ||
1525 | int radeon_device_init(struct radeon_device *rdev, | 1605 | int radeon_device_init(struct radeon_device *rdev, |
@@ -1683,15 +1763,21 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v); | |||
1683 | #define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev)) | 1763 | #define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev)) |
1684 | #define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart.tlb_flush((rdev)) | 1764 | #define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart.tlb_flush((rdev)) |
1685 | #define radeon_gart_set_page(rdev, i, p) (rdev)->asic->gart.set_page((rdev), (i), (p)) | 1765 | #define radeon_gart_set_page(rdev, i, p) (rdev)->asic->gart.set_page((rdev), (i), (p)) |
1766 | #define radeon_asic_vm_init(rdev) (rdev)->asic->vm.init((rdev)) | ||
1767 | #define radeon_asic_vm_fini(rdev) (rdev)->asic->vm.fini((rdev)) | ||
1768 | #define radeon_asic_vm_set_page(rdev, pe, addr, count, incr, flags) ((rdev)->asic->vm.set_page((rdev), (pe), (addr), (count), (incr), (flags))) | ||
1686 | #define radeon_ring_start(rdev, r, cp) (rdev)->asic->ring[(r)].ring_start((rdev), (cp)) | 1769 | #define radeon_ring_start(rdev, r, cp) (rdev)->asic->ring[(r)].ring_start((rdev), (cp)) |
1687 | #define radeon_ring_test(rdev, r, cp) (rdev)->asic->ring[(r)].ring_test((rdev), (cp)) | 1770 | #define radeon_ring_test(rdev, r, cp) (rdev)->asic->ring[(r)].ring_test((rdev), (cp)) |
1688 | #define radeon_ib_test(rdev, r, cp) (rdev)->asic->ring[(r)].ib_test((rdev), (cp)) | 1771 | #define radeon_ib_test(rdev, r, cp) (rdev)->asic->ring[(r)].ib_test((rdev), (cp)) |
1689 | #define radeon_ring_ib_execute(rdev, r, ib) (rdev)->asic->ring[(r)].ib_execute((rdev), (ib)) | 1772 | #define radeon_ring_ib_execute(rdev, r, ib) (rdev)->asic->ring[(r)].ib_execute((rdev), (ib)) |
1690 | #define radeon_ring_ib_parse(rdev, r, ib) (rdev)->asic->ring[(r)].ib_parse((rdev), (ib)) | 1773 | #define radeon_ring_ib_parse(rdev, r, ib) (rdev)->asic->ring[(r)].ib_parse((rdev), (ib)) |
1691 | #define radeon_ring_is_lockup(rdev, r, cp) (rdev)->asic->ring[(r)].is_lockup((rdev), (cp)) | 1774 | #define radeon_ring_is_lockup(rdev, r, cp) (rdev)->asic->ring[(r)].is_lockup((rdev), (cp)) |
1775 | #define radeon_ring_vm_flush(rdev, r, vm) (rdev)->asic->ring[(r)].vm_flush((rdev), (r), (vm)) | ||
1692 | #define radeon_irq_set(rdev) (rdev)->asic->irq.set((rdev)) | 1776 | #define radeon_irq_set(rdev) (rdev)->asic->irq.set((rdev)) |
1693 | #define radeon_irq_process(rdev) (rdev)->asic->irq.process((rdev)) | 1777 | #define radeon_irq_process(rdev) (rdev)->asic->irq.process((rdev)) |
1694 | #define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->display.get_vblank_counter((rdev), (crtc)) | 1778 | #define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->display.get_vblank_counter((rdev), (crtc)) |
1779 | #define radeon_set_backlight_level(rdev, e, l) (rdev)->asic->display.set_backlight_level((e), (l)) | ||
1780 | #define radeon_get_backlight_level(rdev, e) (rdev)->asic->display.get_backlight_level((e)) | ||
1695 | #define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)].emit_fence((rdev), (fence)) | 1781 | #define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)].emit_fence((rdev), (fence)) |
1696 | #define radeon_semaphore_ring_emit(rdev, r, cp, semaphore, emit_wait) (rdev)->asic->ring[(r)].emit_semaphore((rdev), (cp), (semaphore), (emit_wait)) | 1782 | #define radeon_semaphore_ring_emit(rdev, r, cp, semaphore, emit_wait) (rdev)->asic->ring[(r)].emit_semaphore((rdev), (cp), (semaphore), (emit_wait)) |
1697 | #define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy.blit((rdev), (s), (d), (np), (f)) | 1783 | #define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy.blit((rdev), (s), (d), (np), (f)) |
@@ -1759,22 +1845,30 @@ int radeon_vm_manager_init(struct radeon_device *rdev); | |||
1759 | void radeon_vm_manager_fini(struct radeon_device *rdev); | 1845 | void radeon_vm_manager_fini(struct radeon_device *rdev); |
1760 | int radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm); | 1846 | int radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm); |
1761 | void radeon_vm_fini(struct radeon_device *rdev, struct radeon_vm *vm); | 1847 | void radeon_vm_fini(struct radeon_device *rdev, struct radeon_vm *vm); |
1762 | int radeon_vm_bind(struct radeon_device *rdev, struct radeon_vm *vm); | 1848 | int radeon_vm_alloc_pt(struct radeon_device *rdev, struct radeon_vm *vm); |
1763 | void radeon_vm_unbind(struct radeon_device *rdev, struct radeon_vm *vm); | 1849 | struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev, |
1850 | struct radeon_vm *vm, int ring); | ||
1851 | void radeon_vm_fence(struct radeon_device *rdev, | ||
1852 | struct radeon_vm *vm, | ||
1853 | struct radeon_fence *fence); | ||
1854 | uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr); | ||
1764 | int radeon_vm_bo_update_pte(struct radeon_device *rdev, | 1855 | int radeon_vm_bo_update_pte(struct radeon_device *rdev, |
1765 | struct radeon_vm *vm, | 1856 | struct radeon_vm *vm, |
1766 | struct radeon_bo *bo, | 1857 | struct radeon_bo *bo, |
1767 | struct ttm_mem_reg *mem); | 1858 | struct ttm_mem_reg *mem); |
1768 | void radeon_vm_bo_invalidate(struct radeon_device *rdev, | 1859 | void radeon_vm_bo_invalidate(struct radeon_device *rdev, |
1769 | struct radeon_bo *bo); | 1860 | struct radeon_bo *bo); |
1770 | int radeon_vm_bo_add(struct radeon_device *rdev, | 1861 | struct radeon_bo_va *radeon_vm_bo_find(struct radeon_vm *vm, |
1771 | struct radeon_vm *vm, | 1862 | struct radeon_bo *bo); |
1772 | struct radeon_bo *bo, | 1863 | struct radeon_bo_va *radeon_vm_bo_add(struct radeon_device *rdev, |
1773 | uint64_t offset, | 1864 | struct radeon_vm *vm, |
1774 | uint32_t flags); | 1865 | struct radeon_bo *bo); |
1866 | int radeon_vm_bo_set_addr(struct radeon_device *rdev, | ||
1867 | struct radeon_bo_va *bo_va, | ||
1868 | uint64_t offset, | ||
1869 | uint32_t flags); | ||
1775 | int radeon_vm_bo_rmv(struct radeon_device *rdev, | 1870 | int radeon_vm_bo_rmv(struct radeon_device *rdev, |
1776 | struct radeon_vm *vm, | 1871 | struct radeon_bo_va *bo_va); |
1777 | struct radeon_bo *bo); | ||
1778 | 1872 | ||
1779 | /* audio */ | 1873 | /* audio */ |
1780 | void r600_audio_update_hdmi(struct work_struct *work); | 1874 | void r600_audio_update_hdmi(struct work_struct *work); |
@@ -1832,12 +1926,14 @@ extern void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_displ | |||
1832 | extern int ni_init_microcode(struct radeon_device *rdev); | 1926 | extern int ni_init_microcode(struct radeon_device *rdev); |
1833 | extern int ni_mc_load_microcode(struct radeon_device *rdev); | 1927 | extern int ni_mc_load_microcode(struct radeon_device *rdev); |
1834 | 1928 | ||
1835 | /* radeon_acpi.c */ | 1929 | /* radeon_acpi.c */ |
1836 | #if defined(CONFIG_ACPI) | 1930 | #if defined(CONFIG_ACPI) |
1837 | extern int radeon_acpi_init(struct radeon_device *rdev); | 1931 | extern int radeon_acpi_init(struct radeon_device *rdev); |
1838 | #else | 1932 | extern void radeon_acpi_fini(struct radeon_device *rdev); |
1839 | static inline int radeon_acpi_init(struct radeon_device *rdev) { return 0; } | 1933 | #else |
1840 | #endif | 1934 | static inline int radeon_acpi_init(struct radeon_device *rdev) { return 0; } |
1935 | static inline void radeon_acpi_fini(struct radeon_device *rdev) { } | ||
1936 | #endif | ||
1841 | 1937 | ||
1842 | #include "radeon_object.h" | 1938 | #include "radeon_object.h" |
1843 | 1939 | ||