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authorMarek Olšák <maraeo@gmail.com>2012-08-09 10:34:16 -0400
committerAlex Deucher <alexander.deucher@amd.com>2012-08-13 10:50:56 -0400
commitb51ad12a36234c1f6707c9c54a414cfca23f3cdb (patch)
treeab10fb4d373e31a260ffe83cef525bee2345b85c /drivers/gpu/drm/radeon/r600_cs.c
parentf00245f182fab57c5eed28a50764600b2bf1ccdb (diff)
drm/radeon/kms: add MSAA texture support for r600-evergreen
Most of the checking seems to be in place already. As you can see, log2(number of samples) resides in LAST_LEVEL. This is required for MSAA support (namely for depth-stencil resolve and blitting between MSAA resources). Signed-off-by: Marek Olšák <maraeo@gmail.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600_cs.c')
-rw-r--r--drivers/gpu/drm/radeon/r600_cs.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index ff61402ef795..3dab49cb1d4a 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -1620,8 +1620,13 @@ static int r600_check_texture_resource(struct radeon_cs_parser *p, u32 idx,
1620 case V_038000_SQ_TEX_DIM_2D_ARRAY: 1620 case V_038000_SQ_TEX_DIM_2D_ARRAY:
1621 is_array = true; 1621 is_array = true;
1622 break; 1622 break;
1623 case V_038000_SQ_TEX_DIM_2D_MSAA:
1624 case V_038000_SQ_TEX_DIM_2D_ARRAY_MSAA: 1623 case V_038000_SQ_TEX_DIM_2D_ARRAY_MSAA:
1624 is_array = true;
1625 /* fall through */
1626 case V_038000_SQ_TEX_DIM_2D_MSAA:
1627 array_check.nsamples = 1 << llevel;
1628 llevel = 0;
1629 break;
1625 default: 1630 default:
1626 dev_warn(p->dev, "this kernel doesn't support %d texture dim\n", G_038000_DIM(word0)); 1631 dev_warn(p->dev, "this kernel doesn't support %d texture dim\n", G_038000_DIM(word0));
1627 return -EINVAL; 1632 return -EINVAL;