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authorRafał Miłecki <zajec5@gmail.com>2010-03-06 08:03:38 -0500
committerDave Airlie <airlied@redhat.com>2010-03-14 20:05:55 -0400
commit3fe373d98cdb35c494517b0954b76f8094f4c59d (patch)
tree353633b687fb4663fd80abe1eb4cf77a232fd863 /drivers/gpu/drm/radeon/r600_audio.c
parent0a7d934e6022a12e3f428b2adcb4b531e86170dd (diff)
drm/radeon/kms: improve coding style a little
We still have many magic numbers in HDMI/audio to define Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600_audio.c')
-rw-r--r--drivers/gpu/drm/radeon/r600_audio.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c
index dddb9e5e0c61..dac7042b797e 100644
--- a/drivers/gpu/drm/radeon/r600_audio.c
+++ b/drivers/gpu/drm/radeon/r600_audio.c
@@ -197,14 +197,12 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
197 case ENCODER_OBJECT_ID_INTERNAL_LVTM1: 197 case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
198 WREG32_P(R600_AUDIO_TIMING, 0, ~0x301); 198 WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
199 break; 199 break;
200
201 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: 200 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
202 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: 201 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
203 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: 202 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
204 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: 203 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
205 WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301); 204 WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
206 break; 205 break;
207
208 default: 206 default:
209 DRM_ERROR("Unsupported encoder type 0x%02X\n", 207 DRM_ERROR("Unsupported encoder type 0x%02X\n",
210 radeon_encoder->encoder_id); 208 radeon_encoder->encoder_id);
@@ -213,14 +211,14 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
213 211
214 switch (dig->dig_encoder) { 212 switch (dig->dig_encoder) {
215 case 0: 213 case 0:
216 WREG32(R600_AUDIO_PLL1_MUL, base_rate*50); 214 WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50);
217 WREG32(R600_AUDIO_PLL1_DIV, clock*100); 215 WREG32(R600_AUDIO_PLL1_DIV, clock * 100);
218 WREG32(R600_AUDIO_CLK_SRCSEL, 0); 216 WREG32(R600_AUDIO_CLK_SRCSEL, 0);
219 break; 217 break;
220 218
221 case 1: 219 case 1:
222 WREG32(R600_AUDIO_PLL2_MUL, base_rate*50); 220 WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50);
223 WREG32(R600_AUDIO_PLL2_DIV, clock*100); 221 WREG32(R600_AUDIO_PLL2_DIV, clock * 100);
224 WREG32(R600_AUDIO_CLK_SRCSEL, 1); 222 WREG32(R600_AUDIO_CLK_SRCSEL, 1);
225 break; 223 break;
226 default: 224 default: