diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2009-10-22 16:12:34 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-10-25 23:28:22 -0400 |
commit | c290dadf4cac25cc91529d84004795ab43fc0821 (patch) | |
tree | 22015727d8ccfeb2dcb638c5cd29bb04b8353171 /drivers/gpu/drm/radeon/r500_reg.h | |
parent | 33fdb15c99aac20d238af487fa363d3e5c7ed197 (diff) |
drm/radeon/kms/r7xx: add regs for 40 bit CUR/GRPH addresses
The *_HIGH regs are reversed. The secondary ones are in the
primary block and vice versa.
We currently only use a 32 bit internal address, so these are
0 for now.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r500_reg.h')
-rw-r--r-- | drivers/gpu/drm/radeon/r500_reg.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r500_reg.h b/drivers/gpu/drm/radeon/r500_reg.h index 868add6e166d..7baa73955563 100644 --- a/drivers/gpu/drm/radeon/r500_reg.h +++ b/drivers/gpu/drm/radeon/r500_reg.h | |||
@@ -384,9 +384,16 @@ | |||
384 | # define AVIVO_D1GRPH_TILED (1 << 20) | 384 | # define AVIVO_D1GRPH_TILED (1 << 20) |
385 | # define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21) | 385 | # define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21) |
386 | 386 | ||
387 | /* The R7xx *_HIGH surface regs are backwards; the D1 regs are in the D2 | ||
388 | * block and vice versa. This applies to GRPH, CUR, etc. | ||
389 | */ | ||
387 | #define AVIVO_D1GRPH_LUT_SEL 0x6108 | 390 | #define AVIVO_D1GRPH_LUT_SEL 0x6108 |
388 | #define AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110 | 391 | #define AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110 |
392 | #define R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6914 | ||
393 | #define R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6114 | ||
389 | #define AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118 | 394 | #define AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118 |
395 | #define R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x691c | ||
396 | #define R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x611c | ||
390 | #define AVIVO_D1GRPH_PITCH 0x6120 | 397 | #define AVIVO_D1GRPH_PITCH 0x6120 |
391 | #define AVIVO_D1GRPH_SURFACE_OFFSET_X 0x6124 | 398 | #define AVIVO_D1GRPH_SURFACE_OFFSET_X 0x6124 |
392 | #define AVIVO_D1GRPH_SURFACE_OFFSET_Y 0x6128 | 399 | #define AVIVO_D1GRPH_SURFACE_OFFSET_Y 0x6128 |
@@ -404,6 +411,8 @@ | |||
404 | # define AVIVO_D1CURSOR_MODE_MASK (3 << 8) | 411 | # define AVIVO_D1CURSOR_MODE_MASK (3 << 8) |
405 | # define AVIVO_D1CURSOR_MODE_24BPP 2 | 412 | # define AVIVO_D1CURSOR_MODE_24BPP 2 |
406 | #define AVIVO_D1CUR_SURFACE_ADDRESS 0x6408 | 413 | #define AVIVO_D1CUR_SURFACE_ADDRESS 0x6408 |
414 | #define R700_D1CUR_SURFACE_ADDRESS_HIGH 0x6c0c | ||
415 | #define R700_D2CUR_SURFACE_ADDRESS_HIGH 0x640c | ||
407 | #define AVIVO_D1CUR_SIZE 0x6410 | 416 | #define AVIVO_D1CUR_SIZE 0x6410 |
408 | #define AVIVO_D1CUR_POSITION 0x6414 | 417 | #define AVIVO_D1CUR_POSITION 0x6414 |
409 | #define AVIVO_D1CUR_HOT_SPOT 0x6418 | 418 | #define AVIVO_D1CUR_HOT_SPOT 0x6418 |