drm/radeon: remove generic rptr/wptr functions (v2)

Fill in asic family specific versions rather than
using the generic version.  This lets us handle asic
specific differences more easily.  In this case, we
disable sw swapping of the rtpr writeback value on
r6xx+ since the hw does it for us.  Fixes bogus
rptr readback on BE systems.

v2: remove missed cpu_to_le32(), add comments

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 69 insertions, 0 deletions

diff --git a/drivers/gpu/drm/radeon/ni_dma.c b/drivers/gpu/drm/radeon/ni_dma.c
index bdeb65ed3658..51424ab79432 100644
--- a/drivers/gpu/drm/radeon/ni_dma.c
+++ b/drivers/gpu/drm/radeon/ni_dma.c
@@ -43,6 +43,75 @@ u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev);
  */
 
 /**
+ * cayman_dma_get_rptr - get the current read pointer
+ *
+ * @rdev: radeon_device pointer
+ * @ring: radeon ring pointer
+ *
+ * Get the current rptr from the hardware (cayman+).
+ */
+uint32_t cayman_dma_get_rptr(struct radeon_device *rdev,
+                             struct radeon_ring *ring)
+{
+        u32 rptr, reg;
+
+        if (rdev->wb.enabled) {
+                rptr = rdev->wb.wb[ring->rptr_offs/4];
+        } else {
+                if (ring->idx == R600_RING_TYPE_DMA_INDEX)
+                        reg = DMA_RB_RPTR + DMA0_REGISTER_OFFSET;
+                else
+                        reg = DMA_RB_RPTR + DMA1_REGISTER_OFFSET;
+
+                rptr = RREG32(reg);
+        }
+
+        return (rptr & 0x3fffc) >> 2;
+}
+
+/**
+ * cayman_dma_get_wptr - get the current write pointer
+ *
+ * @rdev: radeon_device pointer
+ * @ring: radeon ring pointer
+ *
+ * Get the current wptr from the hardware (cayman+).
+ */
+uint32_t cayman_dma_get_wptr(struct radeon_device *rdev,
+                           struct radeon_ring *ring)
+{
+        u32 reg;
+
+        if (ring->idx == R600_RING_TYPE_DMA_INDEX)
+                reg = DMA_RB_WPTR + DMA0_REGISTER_OFFSET;
+        else
+                reg = DMA_RB_WPTR + DMA1_REGISTER_OFFSET;
+
+        return (RREG32(reg) & 0x3fffc) >> 2;
+}
+
+/**
+ * cayman_dma_set_wptr - commit the write pointer
+ *
+ * @rdev: radeon_device pointer
+ * @ring: radeon ring pointer
+ *
+ * Write the wptr back to the hardware (cayman+).
+ */
+void cayman_dma_set_wptr(struct radeon_device *rdev,
+                         struct radeon_ring *ring)
+{
+        u32 reg;
+
+        if (ring->idx == R600_RING_TYPE_DMA_INDEX)
+                reg = DMA_RB_WPTR + DMA0_REGISTER_OFFSET;
+        else
+                reg = DMA_RB_WPTR + DMA1_REGISTER_OFFSET;
+
+        WREG32(reg, (ring->wptr << 2) & 0x3fffc);
+}
+
+/**
  * cayman_dma_ring_ib_execute - Schedule an IB on the DMA engine
  *
  * @rdev: radeon_device pointer