drm/radeon/kms: add support for multiple fence queues v2

For supporting multiple CP ring buffers, async DMA
engines and UVD.  We still need a way to synchronize
between engines.

v2 initialize unused fence driver ring to avoid issue in
   suspend/unload

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 0e5799857465..710ad8c82767 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1484,7 +1484,7 @@ int cayman_init(struct radeon_device *rdev)
         /* Initialize clocks */
         radeon_get_clock_info(rdev->ddev);
         /* Fence driver */
-        r = radeon_fence_driver_init(rdev);
+        r = radeon_fence_driver_init(rdev, 3);
         if (r)
                 return r;
         /* initialize memory controller */