diff options
author | Dave Airlie <airlied@redhat.com> | 2010-02-05 01:00:07 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2010-02-11 04:11:32 -0500 |
commit | 82568565683b4991964a5fc89a9ca0c7122818e8 (patch) | |
tree | 3c04fa40a00a440a322c802abd41175e90b71e21 /drivers/gpu/drm/radeon/evergreen.c | |
parent | e34398952e056bbd99f9099fae77be26e5c6aa78 (diff) |
drm/radeon/kms: set gart pages to invalid on unbind and point to dummy page
this uses a new entrypoint to invalidate gart entries instead of using 0.
Changed to rather than pointing to 0 address point empty entry to dummy
page. This might help to avoid hard lockup if for some wrong
reasons GPU try to access unmapped GART entry.
I'm not 100% sure this is going to work, we probably need to allocate
a dummy page and point all the GTT entries at it similiar to what AGP does.
but we can test this first I suppose.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen.c')
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index c2f9752e4ee0..3368920df5f4 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -93,6 +93,7 @@ int evergreen_pcie_gart_enable(struct radeon_device *rdev) | |||
93 | r = radeon_gart_table_vram_pin(rdev); | 93 | r = radeon_gart_table_vram_pin(rdev); |
94 | if (r) | 94 | if (r) |
95 | return r; | 95 | return r; |
96 | radeon_gart_restore(rdev); | ||
96 | /* Setup L2 cache */ | 97 | /* Setup L2 cache */ |
97 | WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | | 98 | WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | |
98 | ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE | | 99 | ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE | |