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authorBrian Norris <computersforpeace@gmail.com>2012-10-10 02:26:06 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2012-10-10 02:30:37 -0400
commitbc86cf7af2ebda88056538e8edff852ee627f76a (patch)
tree980fed2c0618867421ccf0479a1ac0a5954f074c /drivers/gpu/drm/radeon/cayman_blit_shaders.h
parent10f39f04b2cb7a06ba5d4ea0f20bd156d0367bee (diff)
mtd: nand: fix Samsung SLC NAND identification regression
A combination of the following two commits caused a regression in 3.7-rc1 when identifying some Samsung NAND, so that some previously working NAND were no longer detected properly: commit e3b88bd604283ef83ae6e8f53622d5b1ffe9d43a mtd: nand: add generic READ ID length calculation functions commit e2d3a35ee427aaba99b6c68a56609ce276c51270 mtd: nand: detect Samsung K9GBG08U0A, K9GAG08U0F ID Particularly, a regression was seen on Samsung K9F2G08U0B, with the following full 8-byte READ ID string: ec da 10 95 44 00 ec da The basic problem is that Samsung manufactures both SLC and MLC NAND that use a non-standard decoding table for deriving information from their IDs. I have heuristically determined that all the chips that use the new table have ID strings which wrap around after the 6th byte. Unfortunately, I overlooked the fact that some older Samsung SLC (which use a different decoding table) have "5 byte ID strings" which also wrap around after the 6th byte. This patch re-introduces a distinction between these old and new Samsung NAND by checking that the 6th byte is non-zero, allowing both old and new Samsung NAND to be detected properly. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Brian Norris <computersforpeace@gmail.com> Reported-by: Marek Vasut <marex@denx.de> Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/cayman_blit_shaders.h')
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