diff options
author | Dave Airlie <airlied@redhat.com> | 2009-12-10 00:47:57 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-12-10 00:48:04 -0500 |
commit | 115a5c2ba0aac55e1bac390f271c818c3cbfa1fb (patch) | |
tree | bf3029a9a68e4d3dbe82553f8a88dc25072c7dc2 /drivers/gpu/drm/radeon/atombios_crtc.c | |
parent | 0b5e8db639de032bd4febbb0a5b1cd2c19bac26d (diff) | |
parent | fb53f8621a3fab88776ae2450a1f3afc7920231b (diff) |
Merge remote branch 'korg/drm-radeon-next' of into drm-linus
This merges some TTM overhauls to allow us to do better object placement
for certain radeon GPUs that need scanout+cursor within range of each other,
along with an API change to not return ERESTART to userspace, but to use
ERESTARTSYS properly internally and have it convert to EINTR and catch that
correctly. Also lots of radeon fixes across the board.
Diffstat (limited to 'drivers/gpu/drm/radeon/atombios_crtc.c')
-rw-r--r-- | drivers/gpu/drm/radeon/atombios_crtc.c | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index fba3c96b915b..260fcf59f00c 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -499,8 +499,18 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
499 | else | 499 | else |
500 | pll = &rdev->clock.p2pll; | 500 | pll = &rdev->clock.p2pll; |
501 | 501 | ||
502 | radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div, | 502 | if (ASIC_IS_AVIVO(rdev)) { |
503 | &ref_div, &post_div, pll_flags); | 503 | if (radeon_new_pll) |
504 | radeon_compute_pll_avivo(pll, adjusted_clock, &pll_clock, | ||
505 | &fb_div, &frac_fb_div, | ||
506 | &ref_div, &post_div, pll_flags); | ||
507 | else | ||
508 | radeon_compute_pll(pll, adjusted_clock, &pll_clock, | ||
509 | &fb_div, &frac_fb_div, | ||
510 | &ref_div, &post_div, pll_flags); | ||
511 | } else | ||
512 | radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div, | ||
513 | &ref_div, &post_div, pll_flags); | ||
504 | 514 | ||
505 | index = GetIndexIntoMasterTable(COMMAND, SetPixelClock); | 515 | index = GetIndexIntoMasterTable(COMMAND, SetPixelClock); |
506 | atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, | 516 | atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, |
@@ -599,8 +609,6 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, | |||
599 | } | 609 | } |
600 | radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); | 610 | radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); |
601 | radeon_bo_unreserve(rbo); | 611 | radeon_bo_unreserve(rbo); |
602 | if (tiling_flags & RADEON_TILING_MACRO) | ||
603 | fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE; | ||
604 | 612 | ||
605 | switch (crtc->fb->bits_per_pixel) { | 613 | switch (crtc->fb->bits_per_pixel) { |
606 | case 8: | 614 | case 8: |
@@ -630,6 +638,9 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, | |||
630 | return -EINVAL; | 638 | return -EINVAL; |
631 | } | 639 | } |
632 | 640 | ||
641 | if (tiling_flags & RADEON_TILING_MACRO) | ||
642 | fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE; | ||
643 | |||
633 | if (tiling_flags & RADEON_TILING_MICRO) | 644 | if (tiling_flags & RADEON_TILING_MICRO) |
634 | fb_format |= AVIVO_D1GRPH_TILED; | 645 | fb_format |= AVIVO_D1GRPH_TILED; |
635 | 646 | ||