diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2012-02-06 01:20:30 -0500 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2012-05-24 02:31:36 -0400 |
commit | 78c20186581c7558429b591fb2942be44b47d59f (patch) | |
tree | 44eb50599b8142f1a3a8088bf5db3e9ec879763b /drivers/gpu/drm/nouveau | |
parent | 9d6ba0b58c5f1ea52b641c36178a27e876b80011 (diff) |
drm/nouveau/pm: some more delays for ddr3 reclocking
These numbers from the binary driver's daemon scripts, and fix the transition
to perflvl 3 on my T510.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_mem.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nva3_pm.c | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c index ec4c53f41171..585dcbeafcda 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mem.c +++ b/drivers/gpu/drm/nouveau/nouveau_mem.c | |||
@@ -978,6 +978,8 @@ nouveau_mem_exec(struct nouveau_mem_exec_func *exec, | |||
978 | break; | 978 | break; |
979 | case NV_MEM_TYPE_DDR3: | 979 | case NV_MEM_TYPE_DDR3: |
980 | tDLLK = 12000; | 980 | tDLLK = 12000; |
981 | tCKSRE = 2000; | ||
982 | tXS = 1000; | ||
981 | mr1_dlloff = 0x00000001; | 983 | mr1_dlloff = 0x00000001; |
982 | break; | 984 | break; |
983 | case NV_MEM_TYPE_GDDR3: | 985 | case NV_MEM_TYPE_GDDR3: |
@@ -1024,6 +1026,7 @@ nouveau_mem_exec(struct nouveau_mem_exec_func *exec, | |||
1024 | exec->refresh_self(exec, false); | 1026 | exec->refresh_self(exec, false); |
1025 | exec->refresh_auto(exec, true); | 1027 | exec->refresh_auto(exec, true); |
1026 | exec->wait(exec, tXS); | 1028 | exec->wait(exec, tXS); |
1029 | exec->wait(exec, tXS); | ||
1027 | 1030 | ||
1028 | /* update MRs */ | 1031 | /* update MRs */ |
1029 | if (mr[2] != info->mr[2]) { | 1032 | if (mr[2] != info->mr[2]) { |
diff --git a/drivers/gpu/drm/nouveau/nva3_pm.c b/drivers/gpu/drm/nouveau/nva3_pm.c index d51e8f86b4d5..798829353fb6 100644 --- a/drivers/gpu/drm/nouveau/nva3_pm.c +++ b/drivers/gpu/drm/nouveau/nva3_pm.c | |||
@@ -344,6 +344,7 @@ mclk_refresh_self(struct nouveau_mem_exec_func *exec, bool enable) | |||
344 | static void | 344 | static void |
345 | mclk_wait(struct nouveau_mem_exec_func *exec, u32 nsec) | 345 | mclk_wait(struct nouveau_mem_exec_func *exec, u32 nsec) |
346 | { | 346 | { |
347 | volatile u32 post = nv_rd32(exec->dev, 0); (void)post; | ||
347 | udelay((nsec + 500) / 1000); | 348 | udelay((nsec + 500) / 1000); |
348 | } | 349 | } |
349 | 350 | ||