diff options
author | Emil Velikov <emil.l.velikov@gmail.com> | 2011-03-19 19:31:52 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2011-05-15 20:47:17 -0400 |
commit | f212949ced2397b5f00e987bb5d4bb34dc69cc8d (patch) | |
tree | c48bee8ffaff8b8d6ff753b9475da4e1c5727e76 /drivers/gpu/drm/nouveau/nvc0_graph.c | |
parent | 71298e2f0b6fb6dce9f2b2e999652edf1f643d9e (diff) |
drm/nouveau: Clean up trailing whitespace and C99-style comments.
Fix 'ERROR: trailing whitespace',
Fix 'ERROR: do not use C99 // comments'
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvc0_graph.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_graph.c | 50 |
1 files changed, 26 insertions, 24 deletions
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c index c19ff3042093..68f5c3f70f54 100644 --- a/drivers/gpu/drm/nouveau/nvc0_graph.c +++ b/drivers/gpu/drm/nouveau/nvc0_graph.c | |||
@@ -452,28 +452,30 @@ nvc0_graph_init_gpc_0(struct drm_device *dev) | |||
452 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 452 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
453 | struct nvc0_graph_priv *priv = dev_priv->engine.graph.priv; | 453 | struct nvc0_graph_priv *priv = dev_priv->engine.graph.priv; |
454 | int gpc; | 454 | int gpc; |
455 | 455 | ||
456 | // TP ROP UNKVAL(magic_not_rop_nr) | 456 | /* |
457 | // 450: 4/0/0/0 2 3 | 457 | * TP ROP UNKVAL(magic_not_rop_nr) |
458 | // 460: 3/4/0/0 4 1 | 458 | * 450: 4/0/0/0 2 3 |
459 | // 465: 3/4/4/0 4 7 | 459 | * 460: 3/4/0/0 4 1 |
460 | // 470: 3/3/4/4 5 5 | 460 | * 465: 3/4/4/0 4 7 |
461 | // 480: 3/4/4/4 6 6 | 461 | * 470: 3/3/4/4 5 5 |
462 | 462 | * 480: 3/4/4/4 6 6 | |
463 | // magicgpc918 | 463 | |
464 | // 450: 00200000 00000000001000000000000000000000 | 464 | * magicgpc918 |
465 | // 460: 00124925 00000000000100100100100100100101 | 465 | * 450: 00200000 00000000001000000000000000000000 |
466 | // 465: 000ba2e9 00000000000010111010001011101001 | 466 | * 460: 00124925 00000000000100100100100100100101 |
467 | // 470: 00092493 00000000000010010010010010010011 | 467 | * 465: 000ba2e9 00000000000010111010001011101001 |
468 | // 480: 00088889 00000000000010001000100010001001 | 468 | * 470: 00092493 00000000000010010010010010010011 |
469 | 469 | * 480: 00088889 00000000000010001000100010001001 | |
470 | /* filled values up to tp_total, remainder 0 */ | 470 | |
471 | // 450: 00003210 00000000 00000000 00000000 | 471 | * filled values up to tp_total, remainder 0 |
472 | // 460: 02321100 00000000 00000000 00000000 | 472 | * 450: 00003210 00000000 00000000 00000000 |
473 | // 465: 22111000 00000233 00000000 00000000 | 473 | * 460: 02321100 00000000 00000000 00000000 |
474 | // 470: 11110000 00233222 00000000 00000000 | 474 | * 465: 22111000 00000233 00000000 00000000 |
475 | // 480: 11110000 03332222 00000000 00000000 | 475 | * 470: 11110000 00233222 00000000 00000000 |
476 | 476 | * 480: 11110000 03332222 00000000 00000000 | |
477 | */ | ||
478 | |||
477 | nv_wr32(dev, GPC_BCAST(0x0980), priv->magicgpc980[0]); | 479 | nv_wr32(dev, GPC_BCAST(0x0980), priv->magicgpc980[0]); |
478 | nv_wr32(dev, GPC_BCAST(0x0984), priv->magicgpc980[1]); | 480 | nv_wr32(dev, GPC_BCAST(0x0984), priv->magicgpc980[1]); |
479 | nv_wr32(dev, GPC_BCAST(0x0988), priv->magicgpc980[2]); | 481 | nv_wr32(dev, GPC_BCAST(0x0988), priv->magicgpc980[2]); |
@@ -676,9 +678,9 @@ nvc0_graph_init(struct drm_device *dev) | |||
676 | 678 | ||
677 | nvc0_graph_init_obj418880(dev); | 679 | nvc0_graph_init_obj418880(dev); |
678 | nvc0_graph_init_regs(dev); | 680 | nvc0_graph_init_regs(dev); |
679 | //nvc0_graph_init_unitplemented_magics(dev); | 681 | /*nvc0_graph_init_unitplemented_magics(dev);*/ |
680 | nvc0_graph_init_gpc_0(dev); | 682 | nvc0_graph_init_gpc_0(dev); |
681 | //nvc0_graph_init_unitplemented_c242(dev); | 683 | /*nvc0_graph_init_unitplemented_c242(dev);*/ |
682 | 684 | ||
683 | nv_wr32(dev, 0x400500, 0x00010001); | 685 | nv_wr32(dev, 0x400500, 0x00010001); |
684 | nv_wr32(dev, 0x400100, 0xffffffff); | 686 | nv_wr32(dev, 0x400100, 0xffffffff); |