Merge branch 'master' into for-next

1 files changed, 23 insertions, 3 deletions

diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c
index 5feacd5d5fa4..eb18a7e89f5b 100644
--- a/drivers/gpu/drm/nouveau/nvc0_graph.c
+++ b/drivers/gpu/drm/nouveau/nvc0_graph.c
@@ -31,6 +31,7 @@
 #include "nvc0_graph.h"
 
 static void nvc0_graph_isr(struct drm_device *);
+static void nvc0_runk140_isr(struct drm_device *);
 static int  nvc0_graph_unload_context_to(struct drm_device *dev, u64 chan);
 
 void
@@ -105,7 +106,8 @@ nvc0_graph_create_context_mmio_list(struct nouveau_channel *chan)
         if (ret)
                 return ret;
 
-        ret = nouveau_gpuobj_new(dev, NULL, 384 * 1024, 4096, NVOBJ_FLAG_VM,
+        ret = nouveau_gpuobj_new(dev, NULL, 384 * 1024, 4096,
+                                 NVOBJ_FLAG_VM | NVOBJ_FLAG_VM_USER,
                                  &grch->unk418810);
         if (ret)
                 return ret;
@@ -280,6 +282,7 @@ nvc0_graph_destroy(struct drm_device *dev)
                 return;
 
         nouveau_irq_unregister(dev, 12);
+        nouveau_irq_unregister(dev, 25);
 
         nouveau_gpuobj_ref(NULL, &priv->unk4188b8);
         nouveau_gpuobj_ref(NULL, &priv->unk4188b4);
@@ -389,6 +392,7 @@ nvc0_graph_create(struct drm_device *dev)
         }
 
         nouveau_irq_register(dev, 12, nvc0_graph_isr);
+        nouveau_irq_register(dev, 25, nvc0_runk140_isr);
         NVOBJ_CLASS(dev, 0x902d, GR); /* 2D */
         NVOBJ_CLASS(dev, 0x9039, GR); /* M2MF */
         NVOBJ_CLASS(dev, 0x9097, GR); /* 3D */
@@ -511,8 +515,8 @@ nvc0_graph_init_gpc_1(struct drm_device *dev)
                         nv_wr32(dev, TP_UNIT(gpc, tp, 0x224), 0xc0000000);
                         nv_wr32(dev, TP_UNIT(gpc, tp, 0x48c), 0xc0000000);
                         nv_wr32(dev, TP_UNIT(gpc, tp, 0x084), 0xc0000000);
-                        nv_wr32(dev, TP_UNIT(gpc, tp, 0xe44), 0x001ffffe);
-                        nv_wr32(dev, TP_UNIT(gpc, tp, 0xe4c), 0x0000000f);
+                        nv_wr32(dev, TP_UNIT(gpc, tp, 0x644), 0x001ffffe);
+                        nv_wr32(dev, TP_UNIT(gpc, tp, 0x64c), 0x0000000f);
                 }
                 nv_wr32(dev, GPC_UNIT(gpc, 0x2c90), 0xffffffff);
                 nv_wr32(dev, GPC_UNIT(gpc, 0x2c94), 0xffffffff);
@@ -776,3 +780,19 @@ nvc0_graph_isr(struct drm_device *dev)
 
         nv_wr32(dev, 0x400500, 0x00010001);
 }
+
+static void
+nvc0_runk140_isr(struct drm_device *dev)
+{
+        u32 units = nv_rd32(dev, 0x00017c) & 0x1f;
+
+        while (units) {
+                u32 unit = ffs(units) - 1;
+                u32 reg = 0x140000 + unit * 0x2000;
+                u32 st0 = nv_mask(dev, reg + 0x1020, 0, 0);
+                u32 st1 = nv_mask(dev, reg + 0x1420, 0, 0);
+
+                NV_INFO(dev, "PRUNK140: %d 0x%08x 0x%08x\n", unit, st0, st1);
+                units &= ~(1 << unit);
+        }
+}