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authorBen Skeggs <bskeggs@redhat.com>2010-12-06 00:28:54 -0500
committerBen Skeggs <bskeggs@redhat.com>2010-12-07 22:48:20 -0500
commit60d2a88ae896ae51c76f8b15c2f4b762d5b00864 (patch)
treee136aee905d35f8936036fd01af1ca29526fcc67 /drivers/gpu/drm/nouveau/nv50_instmem.c
parent34cf01bc4b8021cef62cbd79224577c13d01b106 (diff)
drm/nouveau: kick vram functions out into an "engine"
NVC0 will be able to share some of nv50's paths this way. This also makes it the card-specific vram code responsible for deciding if a given set of tile_flags is valid, rather than duplicating the allowed types in nv50_vram.c and nouveau_gem.c Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv50_instmem.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv50_instmem.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c
index e2efd6f22ffb..38f30270cb9f 100644
--- a/drivers/gpu/drm/nouveau/nv50_instmem.c
+++ b/drivers/gpu/drm/nouveau/nv50_instmem.c
@@ -312,6 +312,7 @@ nv50_instmem_get(struct nouveau_gpuobj *gpuobj, u32 size, u32 align)
312{ 312{
313 struct drm_device *dev = gpuobj->dev; 313 struct drm_device *dev = gpuobj->dev;
314 struct drm_nouveau_private *dev_priv = dev->dev_private; 314 struct drm_nouveau_private *dev_priv = dev->dev_private;
315 struct nouveau_vram_engine *vram = &dev_priv->engine.vram;
315 struct nv50_gpuobj_node *node = NULL; 316 struct nv50_gpuobj_node *node = NULL;
316 int ret; 317 int ret;
317 318
@@ -323,7 +324,7 @@ nv50_instmem_get(struct nouveau_gpuobj *gpuobj, u32 size, u32 align)
323 size = (size + 4095) & ~4095; 324 size = (size + 4095) & ~4095;
324 align = max(align, (u32)4096); 325 align = max(align, (u32)4096);
325 326
326 ret = nv50_vram_new(dev, size, align, 0, 0, &node->vram); 327 ret = vram->get(dev, size, align, 0, 0, &node->vram);
327 if (ret) { 328 if (ret) {
328 kfree(node); 329 kfree(node);
329 return ret; 330 return ret;
@@ -336,7 +337,7 @@ nv50_instmem_get(struct nouveau_gpuobj *gpuobj, u32 size, u32 align)
336 NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS, 337 NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS,
337 &node->chan_vma); 338 &node->chan_vma);
338 if (ret) { 339 if (ret) {
339 nv50_vram_del(dev, &node->vram); 340 vram->put(dev, &node->vram);
340 kfree(node); 341 kfree(node);
341 return ret; 342 return ret;
342 } 343 }
@@ -354,6 +355,8 @@ void
354nv50_instmem_put(struct nouveau_gpuobj *gpuobj) 355nv50_instmem_put(struct nouveau_gpuobj *gpuobj)
355{ 356{
356 struct drm_device *dev = gpuobj->dev; 357 struct drm_device *dev = gpuobj->dev;
358 struct drm_nouveau_private *dev_priv = dev->dev_private;
359 struct nouveau_vram_engine *vram = &dev_priv->engine.vram;
357 struct nv50_gpuobj_node *node; 360 struct nv50_gpuobj_node *node;
358 361
359 node = gpuobj->node; 362 node = gpuobj->node;
@@ -363,7 +366,7 @@ nv50_instmem_put(struct nouveau_gpuobj *gpuobj)
363 nouveau_vm_unmap(&node->chan_vma); 366 nouveau_vm_unmap(&node->chan_vma);
364 nouveau_vm_put(&node->chan_vma); 367 nouveau_vm_put(&node->chan_vma);
365 } 368 }
366 nv50_vram_del(dev, &node->vram); 369 vram->put(dev, &node->vram);
367 kfree(node); 370 kfree(node);
368} 371}
369 372