diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2011-02-06 23:18:37 -0500 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2011-02-24 15:45:14 -0500 |
commit | 1d3fac0c2ae3bb1b054df2f203fdaf08a1d42370 (patch) | |
tree | 3e78c2b37d555f494f58d39b7a0f80a255845a89 /drivers/gpu/drm/nouveau/nv50_crtc.c | |
parent | cdccc70eff1eaf3627a716374f9ebc115fc4621c (diff) |
drm/nv50-nvc0: activate/update ds channel's framebuffer on modesets
The hw doesn't really appear to be designed to be used the way we have to
use it due to DRI2's design. This leads us to having to keep the flipped
fb support active at all times.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv50_crtc.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_crtc.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c b/drivers/gpu/drm/nouveau/nv50_crtc.c index 308af1db8381..568fb4704166 100644 --- a/drivers/gpu/drm/nouveau/nv50_crtc.c +++ b/drivers/gpu/drm/nouveau/nv50_crtc.c | |||
@@ -487,6 +487,7 @@ nv50_crtc_prepare(struct drm_crtc *crtc) | |||
487 | 487 | ||
488 | NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index); | 488 | NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index); |
489 | 489 | ||
490 | nv50_display_flip_stop(crtc); | ||
490 | drm_vblank_pre_modeset(dev, nv_crtc->index); | 491 | drm_vblank_pre_modeset(dev, nv_crtc->index); |
491 | nv50_crtc_blank(nv_crtc, true); | 492 | nv50_crtc_blank(nv_crtc, true); |
492 | } | 493 | } |
@@ -502,6 +503,7 @@ nv50_crtc_commit(struct drm_crtc *crtc) | |||
502 | nv50_crtc_blank(nv_crtc, false); | 503 | nv50_crtc_blank(nv_crtc, false); |
503 | drm_vblank_post_modeset(dev, nv_crtc->index); | 504 | drm_vblank_post_modeset(dev, nv_crtc->index); |
504 | nv50_crtc_wait_complete(crtc); | 505 | nv50_crtc_wait_complete(crtc); |
506 | nv50_display_flip_next(crtc, crtc->fb, NULL); | ||
505 | } | 507 | } |
506 | 508 | ||
507 | static bool | 509 | static bool |
@@ -683,11 +685,16 @@ nv50_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, | |||
683 | { | 685 | { |
684 | int ret; | 686 | int ret; |
685 | 687 | ||
688 | nv50_display_flip_stop(crtc); | ||
686 | ret = nv50_crtc_do_mode_set_base(crtc, old_fb, x, y, false); | 689 | ret = nv50_crtc_do_mode_set_base(crtc, old_fb, x, y, false); |
687 | if (ret) | 690 | if (ret) |
688 | return ret; | 691 | return ret; |
689 | 692 | ||
690 | return nv50_crtc_wait_complete(crtc); | 693 | ret = nv50_crtc_wait_complete(crtc); |
694 | if (ret) | ||
695 | return ret; | ||
696 | |||
697 | return nv50_display_flip_next(crtc, crtc->fb, NULL); | ||
691 | } | 698 | } |
692 | 699 | ||
693 | static int | 700 | static int |
@@ -697,6 +704,7 @@ nv50_crtc_mode_set_base_atomic(struct drm_crtc *crtc, | |||
697 | { | 704 | { |
698 | int ret; | 705 | int ret; |
699 | 706 | ||
707 | nv50_display_flip_stop(crtc); | ||
700 | ret = nv50_crtc_do_mode_set_base(crtc, fb, x, y, true); | 708 | ret = nv50_crtc_do_mode_set_base(crtc, fb, x, y, true); |
701 | if (ret) | 709 | if (ret) |
702 | return ret; | 710 | return ret; |