diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2011-04-04 02:08:24 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2011-05-15 20:48:56 -0400 |
commit | a02ccc7f97d9e9121aa641aca33ba2a2978aef31 (patch) | |
tree | 6c977171670bc47cd6a55bfe6810461e3fcb8975 /drivers/gpu/drm/nouveau/nv40_fifo.c | |
parent | d5a27370b507be810bd32a01fe493adef7ad85d9 (diff) |
drm/nv40/vpe: add support for PMPEG
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv40_fifo.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nv40_fifo.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nv40_fifo.c b/drivers/gpu/drm/nouveau/nv40_fifo.c index 49b9a35a9cd6..68cb2d991c88 100644 --- a/drivers/gpu/drm/nouveau/nv40_fifo.c +++ b/drivers/gpu/drm/nouveau/nv40_fifo.c | |||
@@ -115,6 +115,7 @@ nv40_fifo_do_load_context(struct drm_device *dev, int chid) | |||
115 | nv_wr32(dev, 0x32e8, nv_ri32(dev, fc + 68)); | 115 | nv_wr32(dev, 0x32e8, nv_ri32(dev, fc + 68)); |
116 | nv_wr32(dev, 0x2088, nv_ri32(dev, fc + 76)); | 116 | nv_wr32(dev, 0x2088, nv_ri32(dev, fc + 76)); |
117 | nv_wr32(dev, 0x3300, nv_ri32(dev, fc + 80)); | 117 | nv_wr32(dev, 0x3300, nv_ri32(dev, fc + 80)); |
118 | nv_wr32(dev, 0x330c, nv_ri32(dev, fc + 84)); | ||
118 | 119 | ||
119 | nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0); | 120 | nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0); |
120 | nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0); | 121 | nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0); |
@@ -186,6 +187,7 @@ nv40_fifo_unload_context(struct drm_device *dev) | |||
186 | tmp |= (nv_rd32(dev, NV04_PFIFO_CACHE1_PUT) << 16); | 187 | tmp |= (nv_rd32(dev, NV04_PFIFO_CACHE1_PUT) << 16); |
187 | nv_wi32(dev, fc + 72, tmp); | 188 | nv_wi32(dev, fc + 72, tmp); |
188 | #endif | 189 | #endif |
190 | nv_wi32(dev, fc + 84, nv_rd32(dev, 0x330c)); | ||
189 | 191 | ||
190 | nv40_fifo_do_load_context(dev, pfifo->channels - 1); | 192 | nv40_fifo_do_load_context(dev, pfifo->channels - 1); |
191 | nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, | 193 | nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, |