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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-04 02:29:23 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-04 02:29:23 -0400
commit612a9aab56a93533e76e3ad91642db7033e03b69 (patch)
tree8402096973f67af941f9392f7da06cca03e0b58a /drivers/gpu/drm/nouveau/nv04_dfp.c
parent3a494318b14b1bc0f59d2d6ce84c505c74d82d2a (diff)
parent268d28371cd326be4dfcd7eba5917bf4b9d30c8f (diff)
Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm merge (part 1) from Dave Airlie: "So first of all my tree and uapi stuff has a conflict mess, its my fault as the nouveau stuff didn't hit -next as were trying to rebase regressions out of it before we merged. Highlights: - SH mobile modesetting driver and associated helpers - some DRM core documentation - i915 modesetting rework, haswell hdmi, haswell and vlv fixes, write combined pte writing, ilk rc6 support, - nouveau: major driver rework into a hw core driver, makes features like SLI a lot saner to implement, - psb: add eDP/DP support for Cedarview - radeon: 2 layer page tables, async VM pte updates, better PLL selection for > 2 screens, better ACPI interactions The rest is general grab bag of fixes. So why part 1? well I have the exynos pull req which came in a bit late but was waiting for me to do something they shouldn't have and it looks fairly safe, and David Howells has some more header cleanups he'd like me to pull, that seem like a good idea, but I'd like to get this merge out of the way so -next dosen't get blocked." Tons of conflicts mostly due to silly include line changes, but mostly mindless. A few other small semantic conflicts too, noted from Dave's pre-merged branch. * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (447 commits) drm/nv98/crypt: fix fuc build with latest envyas drm/nouveau/devinit: fixup various issues with subdev ctor/init ordering drm/nv41/vm: fix and enable use of "real" pciegart drm/nv44/vm: fix and enable use of "real" pciegart drm/nv04/dmaobj: fixup vm target handling in preparation for nv4x pcie drm/nouveau: store supported dma mask in vmmgr drm/nvc0/ibus: initial implementation of subdev drm/nouveau/therm: add support for fan-control modes drm/nouveau/hwmon: rename pwm0* to pmw1* to follow hwmon's rules drm/nouveau/therm: calculate the pwm divisor on nv50+ drm/nouveau/fan: rewrite the fan tachometer driver to get more precision, faster drm/nouveau/therm: move thermal-related functions to the therm subdev drm/nouveau/bios: parse the pwm divisor from the perf table drm/nouveau/therm: use the EXTDEV table to detect i2c monitoring devices drm/nouveau/therm: rework thermal table parsing drm/nouveau/gpio: expose the PWM/TOGGLE parameter found in the gpio vbios table drm/nouveau: fix pm initialization order drm/nouveau/bios: check that fixed tvdac gpio data is valid before using it drm/nouveau: log channel debug/error messages from client object rather than drm client drm/nouveau: have drm debugging macros build on top of core macros ...
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv04_dfp.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv04_dfp.c132
1 files changed, 66 insertions, 66 deletions
diff --git a/drivers/gpu/drm/nouveau/nv04_dfp.c b/drivers/gpu/drm/nouveau/nv04_dfp.c
index 55ad2dd653fc..da55d7642c8c 100644
--- a/drivers/gpu/drm/nouveau/nv04_dfp.c
+++ b/drivers/gpu/drm/nouveau/nv04_dfp.c
@@ -27,7 +27,8 @@
27#include <drm/drmP.h> 27#include <drm/drmP.h>
28#include <drm/drm_crtc_helper.h> 28#include <drm/drm_crtc_helper.h>
29 29
30#include "nouveau_drv.h" 30#include "nouveau_drm.h"
31#include "nouveau_reg.h"
31#include "nouveau_encoder.h" 32#include "nouveau_encoder.h"
32#include "nouveau_connector.h" 33#include "nouveau_connector.h"
33#include "nouveau_crtc.h" 34#include "nouveau_crtc.h"
@@ -36,6 +37,8 @@
36 37
37#include <drm/i2c/sil164.h> 38#include <drm/i2c/sil164.h>
38 39
40#include <subdev/i2c.h>
41
39#define FP_TG_CONTROL_ON (NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS | \ 42#define FP_TG_CONTROL_ON (NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS | \
40 NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS | \ 43 NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS | \
41 NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS) 44 NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS)
@@ -49,20 +52,20 @@ static inline bool is_fpc_off(uint32_t fpc)
49 FP_TG_CONTROL_OFF); 52 FP_TG_CONTROL_OFF);
50} 53}
51 54
52int nv04_dfp_get_bound_head(struct drm_device *dev, struct dcb_entry *dcbent) 55int nv04_dfp_get_bound_head(struct drm_device *dev, struct dcb_output *dcbent)
53{ 56{
54 /* special case of nv_read_tmds to find crtc associated with an output. 57 /* special case of nv_read_tmds to find crtc associated with an output.
55 * this does not give a correct answer for off-chip dvi, but there's no 58 * this does not give a correct answer for off-chip dvi, but there's no
56 * use for such an answer anyway 59 * use for such an answer anyway
57 */ 60 */
58 int ramdac = (dcbent->or & OUTPUT_C) >> 2; 61 int ramdac = (dcbent->or & DCB_OUTPUT_C) >> 2;
59 62
60 NVWriteRAMDAC(dev, ramdac, NV_PRAMDAC_FP_TMDS_CONTROL, 63 NVWriteRAMDAC(dev, ramdac, NV_PRAMDAC_FP_TMDS_CONTROL,
61 NV_PRAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE | 0x4); 64 NV_PRAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE | 0x4);
62 return ((NVReadRAMDAC(dev, ramdac, NV_PRAMDAC_FP_TMDS_DATA) & 0x8) >> 3) ^ ramdac; 65 return ((NVReadRAMDAC(dev, ramdac, NV_PRAMDAC_FP_TMDS_DATA) & 0x8) >> 3) ^ ramdac;
63} 66}
64 67
65void nv04_dfp_bind_head(struct drm_device *dev, struct dcb_entry *dcbent, 68void nv04_dfp_bind_head(struct drm_device *dev, struct dcb_output *dcbent,
66 int head, bool dl) 69 int head, bool dl)
67{ 70{
68 /* The BIOS scripts don't do this for us, sadly 71 /* The BIOS scripts don't do this for us, sadly
@@ -72,13 +75,13 @@ void nv04_dfp_bind_head(struct drm_device *dev, struct dcb_entry *dcbent,
72 * (for VT restore etc.) 75 * (for VT restore etc.)
73 */ 76 */
74 77
75 int ramdac = (dcbent->or & OUTPUT_C) >> 2; 78 int ramdac = (dcbent->or & DCB_OUTPUT_C) >> 2;
76 uint8_t tmds04 = 0x80; 79 uint8_t tmds04 = 0x80;
77 80
78 if (head != ramdac) 81 if (head != ramdac)
79 tmds04 = 0x88; 82 tmds04 = 0x88;
80 83
81 if (dcbent->type == OUTPUT_LVDS) 84 if (dcbent->type == DCB_OUTPUT_LVDS)
82 tmds04 |= 0x01; 85 tmds04 |= 0x01;
83 86
84 nv_write_tmds(dev, dcbent->or, 0, 0x04, tmds04); 87 nv_write_tmds(dev, dcbent->or, 0, 0x04, tmds04);
@@ -89,8 +92,7 @@ void nv04_dfp_bind_head(struct drm_device *dev, struct dcb_entry *dcbent,
89 92
90void nv04_dfp_disable(struct drm_device *dev, int head) 93void nv04_dfp_disable(struct drm_device *dev, int head)
91{ 94{
92 struct drm_nouveau_private *dev_priv = dev->dev_private; 95 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg;
93 struct nv04_crtc_reg *crtcstate = dev_priv->mode_reg.crtc_reg;
94 96
95 if (NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL) & 97 if (NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL) &
96 FP_TG_CONTROL_ON) { 98 FP_TG_CONTROL_ON) {
@@ -111,14 +113,13 @@ void nv04_dfp_disable(struct drm_device *dev, int head)
111void nv04_dfp_update_fp_control(struct drm_encoder *encoder, int mode) 113void nv04_dfp_update_fp_control(struct drm_encoder *encoder, int mode)
112{ 114{
113 struct drm_device *dev = encoder->dev; 115 struct drm_device *dev = encoder->dev;
114 struct drm_nouveau_private *dev_priv = dev->dev_private;
115 struct drm_crtc *crtc; 116 struct drm_crtc *crtc;
116 struct nouveau_crtc *nv_crtc; 117 struct nouveau_crtc *nv_crtc;
117 uint32_t *fpc; 118 uint32_t *fpc;
118 119
119 if (mode == DRM_MODE_DPMS_ON) { 120 if (mode == DRM_MODE_DPMS_ON) {
120 nv_crtc = nouveau_crtc(encoder->crtc); 121 nv_crtc = nouveau_crtc(encoder->crtc);
121 fpc = &dev_priv->mode_reg.crtc_reg[nv_crtc->index].fp_control; 122 fpc = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index].fp_control;
122 123
123 if (is_fpc_off(*fpc)) { 124 if (is_fpc_off(*fpc)) {
124 /* using saved value is ok, as (is_digital && dpms_on && 125 /* using saved value is ok, as (is_digital && dpms_on &&
@@ -133,7 +134,7 @@ void nv04_dfp_update_fp_control(struct drm_encoder *encoder, int mode)
133 } else { 134 } else {
134 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 135 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
135 nv_crtc = nouveau_crtc(crtc); 136 nv_crtc = nouveau_crtc(crtc);
136 fpc = &dev_priv->mode_reg.crtc_reg[nv_crtc->index].fp_control; 137 fpc = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index].fp_control;
137 138
138 nv_crtc->fp_users &= ~(1 << nouveau_encoder(encoder)->dcb->index); 139 nv_crtc->fp_users &= ~(1 << nouveau_encoder(encoder)->dcb->index);
139 if (!is_fpc_off(*fpc) && !nv_crtc->fp_users) { 140 if (!is_fpc_off(*fpc) && !nv_crtc->fp_users) {
@@ -151,10 +152,10 @@ void nv04_dfp_update_fp_control(struct drm_encoder *encoder, int mode)
151static struct drm_encoder *get_tmds_slave(struct drm_encoder *encoder) 152static struct drm_encoder *get_tmds_slave(struct drm_encoder *encoder)
152{ 153{
153 struct drm_device *dev = encoder->dev; 154 struct drm_device *dev = encoder->dev;
154 struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb; 155 struct dcb_output *dcb = nouveau_encoder(encoder)->dcb;
155 struct drm_encoder *slave; 156 struct drm_encoder *slave;
156 157
157 if (dcb->type != OUTPUT_TMDS || dcb->location == DCB_LOC_ON_CHIP) 158 if (dcb->type != DCB_OUTPUT_TMDS || dcb->location == DCB_LOC_ON_CHIP)
158 return NULL; 159 return NULL;
159 160
160 /* Some BIOSes (e.g. the one in a Quadro FX1000) report several 161 /* Some BIOSes (e.g. the one in a Quadro FX1000) report several
@@ -168,9 +169,9 @@ static struct drm_encoder *get_tmds_slave(struct drm_encoder *encoder)
168 * let's do the same. 169 * let's do the same.
169 */ 170 */
170 list_for_each_entry(slave, &dev->mode_config.encoder_list, head) { 171 list_for_each_entry(slave, &dev->mode_config.encoder_list, head) {
171 struct dcb_entry *slave_dcb = nouveau_encoder(slave)->dcb; 172 struct dcb_output *slave_dcb = nouveau_encoder(slave)->dcb;
172 173
173 if (slave_dcb->type == OUTPUT_TMDS && get_slave_funcs(slave) && 174 if (slave_dcb->type == DCB_OUTPUT_TMDS && get_slave_funcs(slave) &&
174 slave_dcb->tmdsconf.slave_addr == dcb->tmdsconf.slave_addr) 175 slave_dcb->tmdsconf.slave_addr == dcb->tmdsconf.slave_addr)
175 return slave; 176 return slave;
176 } 177 }
@@ -202,9 +203,8 @@ static bool nv04_dfp_mode_fixup(struct drm_encoder *encoder,
202static void nv04_dfp_prepare_sel_clk(struct drm_device *dev, 203static void nv04_dfp_prepare_sel_clk(struct drm_device *dev,
203 struct nouveau_encoder *nv_encoder, int head) 204 struct nouveau_encoder *nv_encoder, int head)
204{ 205{
205 struct drm_nouveau_private *dev_priv = dev->dev_private; 206 struct nv04_mode_state *state = &nv04_display(dev)->mode_reg;
206 struct nv04_mode_state *state = &dev_priv->mode_reg; 207 uint32_t bits1618 = nv_encoder->dcb->or & DCB_OUTPUT_A ? 0x10000 : 0x40000;
207 uint32_t bits1618 = nv_encoder->dcb->or & OUTPUT_A ? 0x10000 : 0x40000;
208 208
209 if (nv_encoder->dcb->location != DCB_LOC_ON_CHIP) 209 if (nv_encoder->dcb->location != DCB_LOC_ON_CHIP)
210 return; 210 return;
@@ -233,8 +233,8 @@ static void nv04_dfp_prepare_sel_clk(struct drm_device *dev,
233 * and which bit-pair to use, is unclear on nv40 (for earlier cards, the fp table 233 * and which bit-pair to use, is unclear on nv40 (for earlier cards, the fp table
234 * entry has the necessary info) 234 * entry has the necessary info)
235 */ 235 */
236 if (nv_encoder->dcb->type == OUTPUT_LVDS && dev_priv->saved_reg.sel_clk & 0xf0) { 236 if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS && nv04_display(dev)->saved_reg.sel_clk & 0xf0) {
237 int shift = (dev_priv->saved_reg.sel_clk & 0x50) ? 0 : 1; 237 int shift = (nv04_display(dev)->saved_reg.sel_clk & 0x50) ? 0 : 1;
238 238
239 state->sel_clk &= ~0xf0; 239 state->sel_clk &= ~0xf0;
240 state->sel_clk |= (head ? 0x40 : 0x10) << shift; 240 state->sel_clk |= (head ? 0x40 : 0x10) << shift;
@@ -246,9 +246,8 @@ static void nv04_dfp_prepare(struct drm_encoder *encoder)
246 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 246 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
247 struct drm_encoder_helper_funcs *helper = encoder->helper_private; 247 struct drm_encoder_helper_funcs *helper = encoder->helper_private;
248 struct drm_device *dev = encoder->dev; 248 struct drm_device *dev = encoder->dev;
249 struct drm_nouveau_private *dev_priv = dev->dev_private;
250 int head = nouveau_crtc(encoder->crtc)->index; 249 int head = nouveau_crtc(encoder->crtc)->index;
251 struct nv04_crtc_reg *crtcstate = dev_priv->mode_reg.crtc_reg; 250 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg;
252 uint8_t *cr_lcd = &crtcstate[head].CRTC[NV_CIO_CRE_LCD__INDEX]; 251 uint8_t *cr_lcd = &crtcstate[head].CRTC[NV_CIO_CRE_LCD__INDEX];
253 uint8_t *cr_lcd_oth = &crtcstate[head ^ 1].CRTC[NV_CIO_CRE_LCD__INDEX]; 252 uint8_t *cr_lcd_oth = &crtcstate[head ^ 1].CRTC[NV_CIO_CRE_LCD__INDEX];
254 253
@@ -263,7 +262,7 @@ static void nv04_dfp_prepare(struct drm_encoder *encoder)
263 *cr_lcd |= head ? 0x0 : 0x8; 262 *cr_lcd |= head ? 0x0 : 0x8;
264 else { 263 else {
265 *cr_lcd |= (nv_encoder->dcb->or << 4) & 0x30; 264 *cr_lcd |= (nv_encoder->dcb->or << 4) & 0x30;
266 if (nv_encoder->dcb->type == OUTPUT_LVDS) 265 if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS)
267 *cr_lcd |= 0x30; 266 *cr_lcd |= 0x30;
268 if ((*cr_lcd & 0x30) == (*cr_lcd_oth & 0x30)) { 267 if ((*cr_lcd & 0x30) == (*cr_lcd_oth & 0x30)) {
269 /* avoid being connected to both crtcs */ 268 /* avoid being connected to both crtcs */
@@ -282,17 +281,18 @@ static void nv04_dfp_mode_set(struct drm_encoder *encoder,
282 struct drm_display_mode *adjusted_mode) 281 struct drm_display_mode *adjusted_mode)
283{ 282{
284 struct drm_device *dev = encoder->dev; 283 struct drm_device *dev = encoder->dev;
285 struct drm_nouveau_private *dev_priv = dev->dev_private; 284 struct nouveau_device *device = nouveau_dev(dev);
285 struct nouveau_drm *drm = nouveau_drm(dev);
286 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); 286 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
287 struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index]; 287 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];
288 struct nv04_crtc_reg *savep = &dev_priv->saved_reg.crtc_reg[nv_crtc->index]; 288 struct nv04_crtc_reg *savep = &nv04_display(dev)->saved_reg.crtc_reg[nv_crtc->index];
289 struct nouveau_connector *nv_connector = nouveau_crtc_connector_get(nv_crtc); 289 struct nouveau_connector *nv_connector = nouveau_crtc_connector_get(nv_crtc);
290 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 290 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
291 struct drm_display_mode *output_mode = &nv_encoder->mode; 291 struct drm_display_mode *output_mode = &nv_encoder->mode;
292 struct drm_connector *connector = &nv_connector->base; 292 struct drm_connector *connector = &nv_connector->base;
293 uint32_t mode_ratio, panel_ratio; 293 uint32_t mode_ratio, panel_ratio;
294 294
295 NV_DEBUG_KMS(dev, "Output mode on CRTC %d:\n", nv_crtc->index); 295 NV_DEBUG(drm, "Output mode on CRTC %d:\n", nv_crtc->index);
296 drm_mode_debug_printmodeline(output_mode); 296 drm_mode_debug_printmodeline(output_mode);
297 297
298 /* Initialize the FP registers in this CRTC. */ 298 /* Initialize the FP registers in this CRTC. */
@@ -300,10 +300,10 @@ static void nv04_dfp_mode_set(struct drm_encoder *encoder,
300 regp->fp_horiz_regs[FP_TOTAL] = output_mode->htotal - 1; 300 regp->fp_horiz_regs[FP_TOTAL] = output_mode->htotal - 1;
301 if (!nv_gf4_disp_arch(dev) || 301 if (!nv_gf4_disp_arch(dev) ||
302 (output_mode->hsync_start - output_mode->hdisplay) >= 302 (output_mode->hsync_start - output_mode->hdisplay) >=
303 dev_priv->vbios.digital_min_front_porch) 303 drm->vbios.digital_min_front_porch)
304 regp->fp_horiz_regs[FP_CRTC] = output_mode->hdisplay; 304 regp->fp_horiz_regs[FP_CRTC] = output_mode->hdisplay;
305 else 305 else
306 regp->fp_horiz_regs[FP_CRTC] = output_mode->hsync_start - dev_priv->vbios.digital_min_front_porch - 1; 306 regp->fp_horiz_regs[FP_CRTC] = output_mode->hsync_start - drm->vbios.digital_min_front_porch - 1;
307 regp->fp_horiz_regs[FP_SYNC_START] = output_mode->hsync_start - 1; 307 regp->fp_horiz_regs[FP_SYNC_START] = output_mode->hsync_start - 1;
308 regp->fp_horiz_regs[FP_SYNC_END] = output_mode->hsync_end - 1; 308 regp->fp_horiz_regs[FP_SYNC_END] = output_mode->hsync_end - 1;
309 regp->fp_horiz_regs[FP_VALID_START] = output_mode->hskew; 309 regp->fp_horiz_regs[FP_VALID_START] = output_mode->hskew;
@@ -335,12 +335,12 @@ static void nv04_dfp_mode_set(struct drm_encoder *encoder,
335 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_MODE_NATIVE; 335 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_MODE_NATIVE;
336 else /* gpu needs to scale */ 336 else /* gpu needs to scale */
337 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_MODE_SCALE; 337 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_MODE_SCALE;
338 if (nvReadEXTDEV(dev, NV_PEXTDEV_BOOT_0) & NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE_12BIT) 338 if (nv_rd32(device, NV_PEXTDEV_BOOT_0) & NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE_12BIT)
339 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_WIDTH_12; 339 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_WIDTH_12;
340 if (nv_encoder->dcb->location != DCB_LOC_ON_CHIP && 340 if (nv_encoder->dcb->location != DCB_LOC_ON_CHIP &&
341 output_mode->clock > 165000) 341 output_mode->clock > 165000)
342 regp->fp_control |= (2 << 24); 342 regp->fp_control |= (2 << 24);
343 if (nv_encoder->dcb->type == OUTPUT_LVDS) { 343 if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS) {
344 bool duallink = false, dummy; 344 bool duallink = false, dummy;
345 if (nv_connector->edid && 345 if (nv_connector->edid &&
346 nv_connector->type == DCB_CONNECTOR_LVDS_SPWG) { 346 nv_connector->type == DCB_CONNECTOR_LVDS_SPWG) {
@@ -416,7 +416,7 @@ static void nv04_dfp_mode_set(struct drm_encoder *encoder,
416 if ((nv_connector->dithering_mode == DITHERING_MODE_ON) || 416 if ((nv_connector->dithering_mode == DITHERING_MODE_ON) ||
417 (nv_connector->dithering_mode == DITHERING_MODE_AUTO && 417 (nv_connector->dithering_mode == DITHERING_MODE_AUTO &&
418 encoder->crtc->fb->depth > connector->display_info.bpc * 3)) { 418 encoder->crtc->fb->depth > connector->display_info.bpc * 3)) {
419 if (dev_priv->chipset == 0x11) 419 if (nv_device(drm->device)->chipset == 0x11)
420 regp->dither = savep->dither | 0x00010000; 420 regp->dither = savep->dither | 0x00010000;
421 else { 421 else {
422 int i; 422 int i;
@@ -427,7 +427,7 @@ static void nv04_dfp_mode_set(struct drm_encoder *encoder,
427 } 427 }
428 } 428 }
429 } else { 429 } else {
430 if (dev_priv->chipset != 0x11) { 430 if (nv_device(drm->device)->chipset != 0x11) {
431 /* reset them */ 431 /* reset them */
432 int i; 432 int i;
433 for (i = 0; i < 3; i++) { 433 for (i = 0; i < 3; i++) {
@@ -444,26 +444,26 @@ static void nv04_dfp_mode_set(struct drm_encoder *encoder,
444static void nv04_dfp_commit(struct drm_encoder *encoder) 444static void nv04_dfp_commit(struct drm_encoder *encoder)
445{ 445{
446 struct drm_device *dev = encoder->dev; 446 struct drm_device *dev = encoder->dev;
447 struct drm_nouveau_private *dev_priv = dev->dev_private; 447 struct nouveau_drm *drm = nouveau_drm(dev);
448 struct drm_encoder_helper_funcs *helper = encoder->helper_private; 448 struct drm_encoder_helper_funcs *helper = encoder->helper_private;
449 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); 449 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
450 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 450 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
451 struct dcb_entry *dcbe = nv_encoder->dcb; 451 struct dcb_output *dcbe = nv_encoder->dcb;
452 int head = nouveau_crtc(encoder->crtc)->index; 452 int head = nouveau_crtc(encoder->crtc)->index;
453 struct drm_encoder *slave_encoder; 453 struct drm_encoder *slave_encoder;
454 454
455 if (dcbe->type == OUTPUT_TMDS) 455 if (dcbe->type == DCB_OUTPUT_TMDS)
456 run_tmds_table(dev, dcbe, head, nv_encoder->mode.clock); 456 run_tmds_table(dev, dcbe, head, nv_encoder->mode.clock);
457 else if (dcbe->type == OUTPUT_LVDS) 457 else if (dcbe->type == DCB_OUTPUT_LVDS)
458 call_lvds_script(dev, dcbe, head, LVDS_RESET, nv_encoder->mode.clock); 458 call_lvds_script(dev, dcbe, head, LVDS_RESET, nv_encoder->mode.clock);
459 459
460 /* update fp_control state for any changes made by scripts, 460 /* update fp_control state for any changes made by scripts,
461 * so correct value is written at DPMS on */ 461 * so correct value is written at DPMS on */
462 dev_priv->mode_reg.crtc_reg[head].fp_control = 462 nv04_display(dev)->mode_reg.crtc_reg[head].fp_control =
463 NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL); 463 NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL);
464 464
465 /* This could use refinement for flatpanels, but it should work this way */ 465 /* This could use refinement for flatpanels, but it should work this way */
466 if (dev_priv->chipset < 0x44) 466 if (nv_device(drm->device)->chipset < 0x44)
467 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0xf0000000); 467 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0xf0000000);
468 else 468 else
469 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0x00100000); 469 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0x00100000);
@@ -476,7 +476,7 @@ static void nv04_dfp_commit(struct drm_encoder *encoder)
476 476
477 helper->dpms(encoder, DRM_MODE_DPMS_ON); 477 helper->dpms(encoder, DRM_MODE_DPMS_ON);
478 478
479 NV_INFO(dev, "Output %s is running on CRTC %d using output %c\n", 479 NV_INFO(drm, "Output %s is running on CRTC %d using output %c\n",
480 drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base), 480 drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base),
481 nv_crtc->index, '@' + ffs(nv_encoder->dcb->or)); 481 nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
482} 482}
@@ -485,6 +485,7 @@ static void nv04_dfp_update_backlight(struct drm_encoder *encoder, int mode)
485{ 485{
486#ifdef __powerpc__ 486#ifdef __powerpc__
487 struct drm_device *dev = encoder->dev; 487 struct drm_device *dev = encoder->dev;
488 struct nouveau_device *device = nouveau_dev(dev);
488 489
489 /* BIOS scripts usually take care of the backlight, thanks 490 /* BIOS scripts usually take care of the backlight, thanks
490 * Apple for your consistency. 491 * Apple for your consistency.
@@ -492,11 +493,11 @@ static void nv04_dfp_update_backlight(struct drm_encoder *encoder, int mode)
492 if (dev->pci_device == 0x0179 || dev->pci_device == 0x0189 || 493 if (dev->pci_device == 0x0179 || dev->pci_device == 0x0189 ||
493 dev->pci_device == 0x0329) { 494 dev->pci_device == 0x0329) {
494 if (mode == DRM_MODE_DPMS_ON) { 495 if (mode == DRM_MODE_DPMS_ON) {
495 nv_mask(dev, NV_PBUS_DEBUG_DUALHEAD_CTL, 0, 1 << 31); 496 nv_mask(device, NV_PBUS_DEBUG_DUALHEAD_CTL, 0, 1 << 31);
496 nv_mask(dev, NV_PCRTC_GPIO_EXT, 3, 1); 497 nv_mask(device, NV_PCRTC_GPIO_EXT, 3, 1);
497 } else { 498 } else {
498 nv_mask(dev, NV_PBUS_DEBUG_DUALHEAD_CTL, 1 << 31, 0); 499 nv_mask(device, NV_PBUS_DEBUG_DUALHEAD_CTL, 1 << 31, 0);
499 nv_mask(dev, NV_PCRTC_GPIO_EXT, 3, 0); 500 nv_mask(device, NV_PCRTC_GPIO_EXT, 3, 0);
500 } 501 }
501 } 502 }
502#endif 503#endif
@@ -511,7 +512,7 @@ static void nv04_lvds_dpms(struct drm_encoder *encoder, int mode)
511{ 512{
512 struct drm_device *dev = encoder->dev; 513 struct drm_device *dev = encoder->dev;
513 struct drm_crtc *crtc = encoder->crtc; 514 struct drm_crtc *crtc = encoder->crtc;
514 struct drm_nouveau_private *dev_priv = dev->dev_private; 515 struct nouveau_drm *drm = nouveau_drm(dev);
515 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 516 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
516 bool was_powersaving = is_powersaving_dpms(nv_encoder->last_dpms); 517 bool was_powersaving = is_powersaving_dpms(nv_encoder->last_dpms);
517 518
@@ -519,7 +520,7 @@ static void nv04_lvds_dpms(struct drm_encoder *encoder, int mode)
519 return; 520 return;
520 nv_encoder->last_dpms = mode; 521 nv_encoder->last_dpms = mode;
521 522
522 NV_INFO(dev, "Setting dpms mode %d on lvds encoder (output %d)\n", 523 NV_INFO(drm, "Setting dpms mode %d on lvds encoder (output %d)\n",
523 mode, nv_encoder->dcb->index); 524 mode, nv_encoder->dcb->index);
524 525
525 if (was_powersaving && is_powersaving_dpms(mode)) 526 if (was_powersaving && is_powersaving_dpms(mode))
@@ -549,22 +550,22 @@ static void nv04_lvds_dpms(struct drm_encoder *encoder, int mode)
549 if (mode == DRM_MODE_DPMS_ON) 550 if (mode == DRM_MODE_DPMS_ON)
550 nv04_dfp_prepare_sel_clk(dev, nv_encoder, nouveau_crtc(crtc)->index); 551 nv04_dfp_prepare_sel_clk(dev, nv_encoder, nouveau_crtc(crtc)->index);
551 else { 552 else {
552 dev_priv->mode_reg.sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK); 553 nv04_display(dev)->mode_reg.sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK);
553 dev_priv->mode_reg.sel_clk &= ~0xf0; 554 nv04_display(dev)->mode_reg.sel_clk &= ~0xf0;
554 } 555 }
555 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, dev_priv->mode_reg.sel_clk); 556 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, nv04_display(dev)->mode_reg.sel_clk);
556} 557}
557 558
558static void nv04_tmds_dpms(struct drm_encoder *encoder, int mode) 559static void nv04_tmds_dpms(struct drm_encoder *encoder, int mode)
559{ 560{
560 struct drm_device *dev = encoder->dev; 561 struct nouveau_drm *drm = nouveau_drm(encoder->dev);
561 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 562 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
562 563
563 if (nv_encoder->last_dpms == mode) 564 if (nv_encoder->last_dpms == mode)
564 return; 565 return;
565 nv_encoder->last_dpms = mode; 566 nv_encoder->last_dpms = mode;
566 567
567 NV_INFO(dev, "Setting dpms mode %d on tmds encoder (output %d)\n", 568 NV_INFO(drm, "Setting dpms mode %d on tmds encoder (output %d)\n",
568 mode, nv_encoder->dcb->index); 569 mode, nv_encoder->dcb->index);
569 570
570 nv04_dfp_update_backlight(encoder, mode); 571 nv04_dfp_update_backlight(encoder, mode);
@@ -585,10 +586,9 @@ static void nv04_dfp_restore(struct drm_encoder *encoder)
585{ 586{
586 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 587 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
587 struct drm_device *dev = encoder->dev; 588 struct drm_device *dev = encoder->dev;
588 struct drm_nouveau_private *dev_priv = dev->dev_private;
589 int head = nv_encoder->restore.head; 589 int head = nv_encoder->restore.head;
590 590
591 if (nv_encoder->dcb->type == OUTPUT_LVDS) { 591 if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS) {
592 struct nouveau_connector *connector = 592 struct nouveau_connector *connector =
593 nouveau_encoder_connector_get(nv_encoder); 593 nouveau_encoder_connector_get(nv_encoder);
594 594
@@ -597,9 +597,9 @@ static void nv04_dfp_restore(struct drm_encoder *encoder)
597 LVDS_PANEL_ON, 597 LVDS_PANEL_ON,
598 connector->native_mode->clock); 598 connector->native_mode->clock);
599 599
600 } else if (nv_encoder->dcb->type == OUTPUT_TMDS) { 600 } else if (nv_encoder->dcb->type == DCB_OUTPUT_TMDS) {
601 int clock = nouveau_hw_pllvals_to_clk 601 int clock = nouveau_hw_pllvals_to_clk
602 (&dev_priv->saved_reg.crtc_reg[head].pllvals); 602 (&nv04_display(dev)->saved_reg.crtc_reg[head].pllvals);
603 603
604 run_tmds_table(dev, nv_encoder->dcb, head, clock); 604 run_tmds_table(dev, nv_encoder->dcb, head, clock);
605 } 605 }
@@ -611,8 +611,6 @@ static void nv04_dfp_destroy(struct drm_encoder *encoder)
611{ 611{
612 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 612 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
613 613
614 NV_DEBUG_KMS(encoder->dev, "\n");
615
616 if (get_slave_funcs(encoder)) 614 if (get_slave_funcs(encoder))
617 get_slave_funcs(encoder)->destroy(encoder); 615 get_slave_funcs(encoder)->destroy(encoder);
618 616
@@ -623,8 +621,10 @@ static void nv04_dfp_destroy(struct drm_encoder *encoder)
623static void nv04_tmds_slave_init(struct drm_encoder *encoder) 621static void nv04_tmds_slave_init(struct drm_encoder *encoder)
624{ 622{
625 struct drm_device *dev = encoder->dev; 623 struct drm_device *dev = encoder->dev;
626 struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb; 624 struct dcb_output *dcb = nouveau_encoder(encoder)->dcb;
627 struct nouveau_i2c_chan *i2c = nouveau_i2c_find(dev, 2); 625 struct nouveau_drm *drm = nouveau_drm(dev);
626 struct nouveau_i2c *i2c = nouveau_i2c(drm->device);
627 struct nouveau_i2c_port *port = i2c->find(i2c, 2);
628 struct i2c_board_info info[] = { 628 struct i2c_board_info info[] = {
629 { 629 {
630 .type = "sil164", 630 .type = "sil164",
@@ -637,16 +637,16 @@ static void nv04_tmds_slave_init(struct drm_encoder *encoder)
637 }; 637 };
638 int type; 638 int type;
639 639
640 if (!nv_gf4_disp_arch(dev) || !i2c || 640 if (!nv_gf4_disp_arch(dev) || !port ||
641 get_tmds_slave(encoder)) 641 get_tmds_slave(encoder))
642 return; 642 return;
643 643
644 type = nouveau_i2c_identify(dev, "TMDS transmitter", info, NULL, 2); 644 type = i2c->identify(i2c, 2, "TMDS transmitter", info, NULL);
645 if (type < 0) 645 if (type < 0)
646 return; 646 return;
647 647
648 drm_i2c_encoder_init(dev, to_encoder_slave(encoder), 648 drm_i2c_encoder_init(dev, to_encoder_slave(encoder),
649 &i2c->adapter, &info[type]); 649 &port->adapter, &info[type]);
650} 650}
651 651
652static const struct drm_encoder_helper_funcs nv04_lvds_helper_funcs = { 652static const struct drm_encoder_helper_funcs nv04_lvds_helper_funcs = {
@@ -676,7 +676,7 @@ static const struct drm_encoder_funcs nv04_dfp_funcs = {
676}; 676};
677 677
678int 678int
679nv04_dfp_create(struct drm_connector *connector, struct dcb_entry *entry) 679nv04_dfp_create(struct drm_connector *connector, struct dcb_output *entry)
680{ 680{
681 const struct drm_encoder_helper_funcs *helper; 681 const struct drm_encoder_helper_funcs *helper;
682 struct nouveau_encoder *nv_encoder = NULL; 682 struct nouveau_encoder *nv_encoder = NULL;
@@ -684,11 +684,11 @@ nv04_dfp_create(struct drm_connector *connector, struct dcb_entry *entry)
684 int type; 684 int type;
685 685
686 switch (entry->type) { 686 switch (entry->type) {
687 case OUTPUT_TMDS: 687 case DCB_OUTPUT_TMDS:
688 type = DRM_MODE_ENCODER_TMDS; 688 type = DRM_MODE_ENCODER_TMDS;
689 helper = &nv04_tmds_helper_funcs; 689 helper = &nv04_tmds_helper_funcs;
690 break; 690 break;
691 case OUTPUT_LVDS: 691 case DCB_OUTPUT_LVDS:
692 type = DRM_MODE_ENCODER_LVDS; 692 type = DRM_MODE_ENCODER_LVDS;
693 helper = &nv04_lvds_helper_funcs; 693 helper = &nv04_lvds_helper_funcs;
694 break; 694 break;
@@ -711,7 +711,7 @@ nv04_dfp_create(struct drm_connector *connector, struct dcb_entry *entry)
711 encoder->possible_crtcs = entry->heads; 711 encoder->possible_crtcs = entry->heads;
712 encoder->possible_clones = 0; 712 encoder->possible_clones = 0;
713 713
714 if (entry->type == OUTPUT_TMDS && 714 if (entry->type == DCB_OUTPUT_TMDS &&
715 entry->location != DCB_LOC_ON_CHIP) 715 entry->location != DCB_LOC_ON_CHIP)
716 nv04_tmds_slave_init(encoder); 716 nv04_tmds_slave_init(encoder);
717 717