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authorBen Skeggs <bskeggs@redhat.com>2011-11-21 01:41:48 -0500
committerBen Skeggs <bskeggs@redhat.com>2011-12-21 04:01:45 -0500
commita0b25635515ef5049f93b032a1e37f18b16e0f6f (patch)
tree34c25948a2fd7b8eadf46418d767d43c9a64c06b /drivers/gpu/drm/nouveau/nouveau_state.c
parent675aac033e089833e763ea4fbabae66883d10574 (diff)
drm/nouveau/gpio: reimplement as nouveau_gpio.c, fixing a number of issues
- moves out of nouveau_bios.c and demagics the logical state definitions - simplifies chipset-specific driver interface - makes most of gpio irq handling common, will use for nv4x hpd later - api extended to allow both direct gpio access, and access using the logical function states - api extended to allow for future use of gpio extender chips - pre-nv50 was handled very badly, the main issue being that all GPIOs were being treated as output-only. - fixes nvd0 so gpio changes actually stick, magic reg needs bashing Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_state.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_state.c64
1 files changed, 21 insertions, 43 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index 5d8ad4ec3ac1..c4edba6a457d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -36,6 +36,7 @@
36#include "nouveau_drm.h" 36#include "nouveau_drm.h"
37#include "nouveau_fbcon.h" 37#include "nouveau_fbcon.h"
38#include "nouveau_ramht.h" 38#include "nouveau_ramht.h"
39#include "nouveau_gpio.h"
39#include "nouveau_pm.h" 40#include "nouveau_pm.h"
40#include "nv50_display.h" 41#include "nv50_display.h"
41 42
@@ -83,11 +84,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
83 engine->display.destroy = nv04_display_destroy; 84 engine->display.destroy = nv04_display_destroy;
84 engine->display.init = nv04_display_init; 85 engine->display.init = nv04_display_init;
85 engine->display.fini = nv04_display_fini; 86 engine->display.fini = nv04_display_fini;
86 engine->gpio.init = nouveau_stub_init;
87 engine->gpio.takedown = nouveau_stub_takedown;
88 engine->gpio.get = NULL;
89 engine->gpio.set = NULL;
90 engine->gpio.irq_enable = NULL;
91 engine->pm.clocks_get = nv04_pm_clocks_get; 87 engine->pm.clocks_get = nv04_pm_clocks_get;
92 engine->pm.clocks_pre = nv04_pm_clocks_pre; 88 engine->pm.clocks_pre = nv04_pm_clocks_pre;
93 engine->pm.clocks_set = nv04_pm_clocks_set; 89 engine->pm.clocks_set = nv04_pm_clocks_set;
@@ -133,11 +129,8 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
133 engine->display.destroy = nv04_display_destroy; 129 engine->display.destroy = nv04_display_destroy;
134 engine->display.init = nv04_display_init; 130 engine->display.init = nv04_display_init;
135 engine->display.fini = nv04_display_fini; 131 engine->display.fini = nv04_display_fini;
136 engine->gpio.init = nouveau_stub_init; 132 engine->gpio.drive = nv10_gpio_drive;
137 engine->gpio.takedown = nouveau_stub_takedown; 133 engine->gpio.sense = nv10_gpio_sense;
138 engine->gpio.get = nv10_gpio_get;
139 engine->gpio.set = nv10_gpio_set;
140 engine->gpio.irq_enable = NULL;
141 engine->pm.clocks_get = nv04_pm_clocks_get; 134 engine->pm.clocks_get = nv04_pm_clocks_get;
142 engine->pm.clocks_pre = nv04_pm_clocks_pre; 135 engine->pm.clocks_pre = nv04_pm_clocks_pre;
143 engine->pm.clocks_set = nv04_pm_clocks_set; 136 engine->pm.clocks_set = nv04_pm_clocks_set;
@@ -183,11 +176,8 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
183 engine->display.destroy = nv04_display_destroy; 176 engine->display.destroy = nv04_display_destroy;
184 engine->display.init = nv04_display_init; 177 engine->display.init = nv04_display_init;
185 engine->display.fini = nv04_display_fini; 178 engine->display.fini = nv04_display_fini;
186 engine->gpio.init = nouveau_stub_init; 179 engine->gpio.drive = nv10_gpio_drive;
187 engine->gpio.takedown = nouveau_stub_takedown; 180 engine->gpio.sense = nv10_gpio_sense;
188 engine->gpio.get = nv10_gpio_get;
189 engine->gpio.set = nv10_gpio_set;
190 engine->gpio.irq_enable = NULL;
191 engine->pm.clocks_get = nv04_pm_clocks_get; 181 engine->pm.clocks_get = nv04_pm_clocks_get;
192 engine->pm.clocks_pre = nv04_pm_clocks_pre; 182 engine->pm.clocks_pre = nv04_pm_clocks_pre;
193 engine->pm.clocks_set = nv04_pm_clocks_set; 183 engine->pm.clocks_set = nv04_pm_clocks_set;
@@ -233,11 +223,8 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
233 engine->display.destroy = nv04_display_destroy; 223 engine->display.destroy = nv04_display_destroy;
234 engine->display.init = nv04_display_init; 224 engine->display.init = nv04_display_init;
235 engine->display.fini = nv04_display_fini; 225 engine->display.fini = nv04_display_fini;
236 engine->gpio.init = nouveau_stub_init; 226 engine->gpio.drive = nv10_gpio_drive;
237 engine->gpio.takedown = nouveau_stub_takedown; 227 engine->gpio.sense = nv10_gpio_sense;
238 engine->gpio.get = nv10_gpio_get;
239 engine->gpio.set = nv10_gpio_set;
240 engine->gpio.irq_enable = NULL;
241 engine->pm.clocks_get = nv04_pm_clocks_get; 228 engine->pm.clocks_get = nv04_pm_clocks_get;
242 engine->pm.clocks_pre = nv04_pm_clocks_pre; 229 engine->pm.clocks_pre = nv04_pm_clocks_pre;
243 engine->pm.clocks_set = nv04_pm_clocks_set; 230 engine->pm.clocks_set = nv04_pm_clocks_set;
@@ -286,11 +273,8 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
286 engine->display.destroy = nv04_display_destroy; 273 engine->display.destroy = nv04_display_destroy;
287 engine->display.init = nv04_display_init; 274 engine->display.init = nv04_display_init;
288 engine->display.fini = nv04_display_fini; 275 engine->display.fini = nv04_display_fini;
289 engine->gpio.init = nouveau_stub_init; 276 engine->gpio.drive = nv10_gpio_drive;
290 engine->gpio.takedown = nouveau_stub_takedown; 277 engine->gpio.sense = nv10_gpio_sense;
291 engine->gpio.get = nv10_gpio_get;
292 engine->gpio.set = nv10_gpio_set;
293 engine->gpio.irq_enable = NULL;
294 engine->pm.clocks_get = nv40_pm_clocks_get; 278 engine->pm.clocks_get = nv40_pm_clocks_get;
295 engine->pm.clocks_pre = nv40_pm_clocks_pre; 279 engine->pm.clocks_pre = nv40_pm_clocks_pre;
296 engine->pm.clocks_set = nv40_pm_clocks_set; 280 engine->pm.clocks_set = nv40_pm_clocks_set;
@@ -345,11 +329,9 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
345 engine->display.init = nv50_display_init; 329 engine->display.init = nv50_display_init;
346 engine->display.fini = nv50_display_fini; 330 engine->display.fini = nv50_display_fini;
347 engine->gpio.init = nv50_gpio_init; 331 engine->gpio.init = nv50_gpio_init;
348 engine->gpio.takedown = nv50_gpio_fini; 332 engine->gpio.fini = nv50_gpio_fini;
349 engine->gpio.get = nv50_gpio_get; 333 engine->gpio.drive = nv50_gpio_drive;
350 engine->gpio.set = nv50_gpio_set; 334 engine->gpio.sense = nv50_gpio_sense;
351 engine->gpio.irq_register = nv50_gpio_irq_register;
352 engine->gpio.irq_unregister = nv50_gpio_irq_unregister;
353 engine->gpio.irq_enable = nv50_gpio_irq_enable; 335 engine->gpio.irq_enable = nv50_gpio_irq_enable;
354 switch (dev_priv->chipset) { 336 switch (dev_priv->chipset) {
355 case 0x84: 337 case 0x84:
@@ -421,11 +403,9 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
421 engine->display.init = nv50_display_init; 403 engine->display.init = nv50_display_init;
422 engine->display.fini = nv50_display_fini; 404 engine->display.fini = nv50_display_fini;
423 engine->gpio.init = nv50_gpio_init; 405 engine->gpio.init = nv50_gpio_init;
424 engine->gpio.takedown = nouveau_stub_takedown; 406 engine->gpio.fini = nv50_gpio_fini;
425 engine->gpio.get = nv50_gpio_get; 407 engine->gpio.drive = nv50_gpio_drive;
426 engine->gpio.set = nv50_gpio_set; 408 engine->gpio.sense = nv50_gpio_sense;
427 engine->gpio.irq_register = nv50_gpio_irq_register;
428 engine->gpio.irq_unregister = nv50_gpio_irq_unregister;
429 engine->gpio.irq_enable = nv50_gpio_irq_enable; 409 engine->gpio.irq_enable = nv50_gpio_irq_enable;
430 engine->vram.init = nvc0_vram_init; 410 engine->vram.init = nvc0_vram_init;
431 engine->vram.takedown = nv50_vram_fini; 411 engine->vram.takedown = nv50_vram_fini;
@@ -474,11 +454,9 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
474 engine->display.init = nvd0_display_init; 454 engine->display.init = nvd0_display_init;
475 engine->display.fini = nvd0_display_fini; 455 engine->display.fini = nvd0_display_fini;
476 engine->gpio.init = nv50_gpio_init; 456 engine->gpio.init = nv50_gpio_init;
477 engine->gpio.takedown = nouveau_stub_takedown; 457 engine->gpio.fini = nv50_gpio_fini;
478 engine->gpio.get = nvd0_gpio_get; 458 engine->gpio.drive = nvd0_gpio_drive;
479 engine->gpio.set = nvd0_gpio_set; 459 engine->gpio.sense = nvd0_gpio_sense;
480 engine->gpio.irq_register = nv50_gpio_irq_register;
481 engine->gpio.irq_unregister = nv50_gpio_irq_unregister;
482 engine->gpio.irq_enable = nv50_gpio_irq_enable; 460 engine->gpio.irq_enable = nv50_gpio_irq_enable;
483 engine->vram.init = nvc0_vram_init; 461 engine->vram.init = nvc0_vram_init;
484 engine->vram.takedown = nv50_vram_fini; 462 engine->vram.takedown = nv50_vram_fini;
@@ -630,7 +608,7 @@ nouveau_card_init(struct drm_device *dev)
630 goto out_gart; 608 goto out_gart;
631 609
632 /* PGPIO */ 610 /* PGPIO */
633 ret = engine->gpio.init(dev); 611 ret = nouveau_gpio_create(dev);
634 if (ret) 612 if (ret)
635 goto out_mc; 613 goto out_mc;
636 614
@@ -798,7 +776,7 @@ out_engine:
798out_timer: 776out_timer:
799 engine->timer.takedown(dev); 777 engine->timer.takedown(dev);
800out_gpio: 778out_gpio:
801 engine->gpio.takedown(dev); 779 nouveau_gpio_destroy(dev);
802out_mc: 780out_mc:
803 engine->mc.takedown(dev); 781 engine->mc.takedown(dev);
804out_gart: 782out_gart:
@@ -851,7 +829,7 @@ static void nouveau_card_takedown(struct drm_device *dev)
851 } 829 }
852 engine->fb.takedown(dev); 830 engine->fb.takedown(dev);
853 engine->timer.takedown(dev); 831 engine->timer.takedown(dev);
854 engine->gpio.takedown(dev); 832 nouveau_gpio_destroy(dev);
855 engine->mc.takedown(dev); 833 engine->mc.takedown(dev);
856 engine->display.late_takedown(dev); 834 engine->display.late_takedown(dev);
857 835