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authorBen Skeggs <bskeggs@redhat.com>2011-11-21 06:28:28 -0500
committerBen Skeggs <bskeggs@redhat.com>2011-12-21 04:01:44 -0500
commit675aac033e089833e763ea4fbabae66883d10574 (patch)
tree69e16cb4743d72b36d54bcffa57bf06b9eb449cc /drivers/gpu/drm/nouveau/nouveau_pm.h
parentc8b9641a9146b13d34824f99c3d22c8c0c3a06bd (diff)
drm/nouveau: just pass gpio line to pwm_*, not entire gpio struct
We don't need more than the line id to determine the PWM controller, and the GPIO interfaces are about to change somewhat. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_pm.h')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_pm.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_pm.h b/drivers/gpu/drm/nouveau/nouveau_pm.h
index 663088d30428..7e0cc2eeb307 100644
--- a/drivers/gpu/drm/nouveau/nouveau_pm.h
+++ b/drivers/gpu/drm/nouveau/nouveau_pm.h
@@ -55,15 +55,15 @@ int nv04_pm_clocks_set(struct drm_device *, void *);
55int nv40_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *); 55int nv40_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);
56void *nv40_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *); 56void *nv40_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *);
57int nv40_pm_clocks_set(struct drm_device *, void *); 57int nv40_pm_clocks_set(struct drm_device *, void *);
58int nv40_pm_pwm_get(struct drm_device *, struct dcb_gpio_entry *, u32*, u32*); 58int nv40_pm_pwm_get(struct drm_device *, int, u32 *, u32 *);
59int nv40_pm_pwm_set(struct drm_device *, struct dcb_gpio_entry *, u32, u32); 59int nv40_pm_pwm_set(struct drm_device *, int, u32, u32);
60 60
61/* nv50_pm.c */ 61/* nv50_pm.c */
62int nv50_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *); 62int nv50_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);
63void *nv50_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *); 63void *nv50_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *);
64int nv50_pm_clocks_set(struct drm_device *, void *); 64int nv50_pm_clocks_set(struct drm_device *, void *);
65int nv50_pm_pwm_get(struct drm_device *, struct dcb_gpio_entry *, u32*, u32*); 65int nv50_pm_pwm_get(struct drm_device *, int, u32 *, u32 *);
66int nv50_pm_pwm_set(struct drm_device *, struct dcb_gpio_entry *, u32, u32); 66int nv50_pm_pwm_set(struct drm_device *, int, u32, u32);
67 67
68/* nva3_pm.c */ 68/* nva3_pm.c */
69int nva3_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *); 69int nva3_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);