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authorBen Skeggs <bskeggs@redhat.com>2010-09-01 01:24:32 -0400
committerBen Skeggs <bskeggs@redhat.com>2010-09-24 02:20:23 -0400
commit43efc9ce25c6956133c07394a6fa44ef2c9268a4 (patch)
tree8da4a62301dbc850ca92c8094eb2a86c80bd3b1a /drivers/gpu/drm/nouveau/nouveau_object.c
parenta8eaebc6c52bb0cd243b4cb421068f42d378be9c (diff)
drm/nouveau: simplify fake gpu objects
Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_object.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_object.c70
1 files changed, 23 insertions, 47 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_object.c b/drivers/gpu/drm/nouveau/nouveau_object.c
index d55c50f1a2d3..4bcea11f54e6 100644
--- a/drivers/gpu/drm/nouveau/nouveau_object.c
+++ b/drivers/gpu/drm/nouveau/nouveau_object.c
@@ -91,6 +91,7 @@ nouveau_gpuobj_new(struct drm_device *dev, struct nouveau_channel *chan,
91 gpuobj->dev = dev; 91 gpuobj->dev = dev;
92 gpuobj->flags = flags; 92 gpuobj->flags = flags;
93 gpuobj->refcount = 1; 93 gpuobj->refcount = 1;
94 gpuobj->size = size;
94 95
95 list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list); 96 list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list);
96 97
@@ -133,25 +134,23 @@ nouveau_gpuobj_new(struct drm_device *dev, struct nouveau_channel *chan,
133 134
134 /* calculate the various different addresses for the object */ 135 /* calculate the various different addresses for the object */
135 if (chan) { 136 if (chan) {
136 gpuobj->pinst = gpuobj->im_pramin->start + 137 gpuobj->pinst = gpuobj->im_pramin->start + chan->ramin->pinst;
137 chan->ramin->im_pramin->start;
138 if (dev_priv->card_type < NV_50) { 138 if (dev_priv->card_type < NV_50) {
139 gpuobj->cinst = gpuobj->pinst; 139 gpuobj->cinst = gpuobj->pinst;
140 } else { 140 } else {
141 gpuobj->cinst = gpuobj->im_pramin->start; 141 gpuobj->cinst = gpuobj->im_pramin->start;
142 gpuobj->vinst = gpuobj->im_pramin->start + 142 gpuobj->vinst = gpuobj->im_pramin->start +
143 chan->ramin->im_backing_start; 143 chan->ramin->vinst;
144 } 144 }
145 } else { 145 } else {
146 gpuobj->pinst = gpuobj->im_pramin->start; 146 gpuobj->pinst = gpuobj->im_pramin->start;
147 gpuobj->cinst = 0xdeadbeef; 147 gpuobj->cinst = 0xdeadbeef;
148 gpuobj->vinst = gpuobj->im_backing_start;
149 } 148 }
150 149
151 if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) { 150 if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) {
152 int i; 151 int i;
153 152
154 for (i = 0; i < gpuobj->im_pramin->size; i += 4) 153 for (i = 0; i < gpuobj->size; i += 4)
155 nv_wo32(gpuobj, i, 0); 154 nv_wo32(gpuobj, i, 0);
156 engine->instmem.flush(dev); 155 engine->instmem.flush(dev);
157 } 156 }
@@ -237,7 +236,7 @@ nouveau_gpuobj_del(struct nouveau_gpuobj *gpuobj)
237 NV_DEBUG(dev, "gpuobj %p\n", gpuobj); 236 NV_DEBUG(dev, "gpuobj %p\n", gpuobj);
238 237
239 if (gpuobj->im_pramin && (gpuobj->flags & NVOBJ_FLAG_ZERO_FREE)) { 238 if (gpuobj->im_pramin && (gpuobj->flags & NVOBJ_FLAG_ZERO_FREE)) {
240 for (i = 0; i < gpuobj->im_pramin->size; i += 4) 239 for (i = 0; i < gpuobj->size; i += 4)
241 nv_wo32(gpuobj, i, 0); 240 nv_wo32(gpuobj, i, 0);
242 engine->instmem.flush(dev); 241 engine->instmem.flush(dev);
243 } 242 }
@@ -245,15 +244,11 @@ nouveau_gpuobj_del(struct nouveau_gpuobj *gpuobj)
245 if (gpuobj->dtor) 244 if (gpuobj->dtor)
246 gpuobj->dtor(dev, gpuobj); 245 gpuobj->dtor(dev, gpuobj);
247 246
248 if (gpuobj->im_backing && !(gpuobj->flags & NVOBJ_FLAG_FAKE)) 247 if (gpuobj->im_backing)
249 engine->instmem.clear(dev, gpuobj); 248 engine->instmem.clear(dev, gpuobj);
250 249
251 if (gpuobj->im_pramin) { 250 if (gpuobj->im_pramin)
252 if (gpuobj->flags & NVOBJ_FLAG_FAKE) 251 drm_mm_put_block(gpuobj->im_pramin);
253 kfree(gpuobj->im_pramin);
254 else
255 drm_mm_put_block(gpuobj->im_pramin);
256 }
257 252
258 list_del(&gpuobj->list); 253 list_del(&gpuobj->list);
259 254
@@ -274,56 +269,37 @@ nouveau_gpuobj_ref(struct nouveau_gpuobj *ref, struct nouveau_gpuobj **ptr)
274} 269}
275 270
276int 271int
277nouveau_gpuobj_new_fake(struct drm_device *dev, uint32_t p_offset, 272nouveau_gpuobj_new_fake(struct drm_device *dev, u32 pinst, u64 vinst,
278 uint32_t b_offset, uint32_t size, 273 u32 size, u32 flags, struct nouveau_gpuobj **pgpuobj)
279 uint32_t flags, struct nouveau_gpuobj **pgpuobj)
280{ 274{
281 struct drm_nouveau_private *dev_priv = dev->dev_private; 275 struct drm_nouveau_private *dev_priv = dev->dev_private;
282 struct nouveau_gpuobj *gpuobj = NULL; 276 struct nouveau_gpuobj *gpuobj = NULL;
283 int i; 277 int i;
284 278
285 NV_DEBUG(dev, 279 NV_DEBUG(dev,
286 "p_offset=0x%08x b_offset=0x%08x size=0x%08x flags=0x%08x\n", 280 "pinst=0x%08x vinst=0x%010llx size=0x%08x flags=0x%08x\n",
287 p_offset, b_offset, size, flags); 281 pinst, vinst, size, flags);
288 282
289 gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL); 283 gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL);
290 if (!gpuobj) 284 if (!gpuobj)
291 return -ENOMEM; 285 return -ENOMEM;
292 NV_DEBUG(dev, "gpuobj %p\n", gpuobj); 286 NV_DEBUG(dev, "gpuobj %p\n", gpuobj);
293 gpuobj->dev = dev; 287 gpuobj->dev = dev;
294 gpuobj->flags = flags | NVOBJ_FLAG_FAKE; 288 gpuobj->flags = flags;
295 gpuobj->refcount = 1; 289 gpuobj->refcount = 1;
296 290 gpuobj->size = size;
297 list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list); 291 gpuobj->pinst = pinst;
298
299 if (p_offset != ~0) {
300 gpuobj->im_pramin = kzalloc(sizeof(struct drm_mm_node),
301 GFP_KERNEL);
302 if (!gpuobj->im_pramin) {
303 nouveau_gpuobj_ref(NULL, &gpuobj);
304 return -ENOMEM;
305 }
306 gpuobj->im_pramin->start = p_offset;
307 gpuobj->im_pramin->size = size;
308 }
309
310 if (b_offset != ~0) {
311 gpuobj->im_backing = (struct nouveau_bo *)-1;
312 gpuobj->im_backing_start = b_offset;
313 }
314
315 gpuobj->pinst = gpuobj->im_pramin->start;
316 gpuobj->cinst = 0xdeadbeef; 292 gpuobj->cinst = 0xdeadbeef;
317 gpuobj->vinst = gpuobj->im_backing_start; 293 gpuobj->vinst = vinst;
318 294
319 if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) { 295 if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) {
320 for (i = 0; i < gpuobj->im_pramin->size; i += 4) 296 for (i = 0; i < gpuobj->size; i += 4)
321 nv_wo32(gpuobj, i, 0); 297 nv_wo32(gpuobj, i, 0);
322 dev_priv->engine.instmem.flush(dev); 298 dev_priv->engine.instmem.flush(dev);
323 } 299 }
324 300
325 if (pgpuobj) 301 list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list);
326 *pgpuobj = gpuobj; 302 *pgpuobj = gpuobj;
327 return 0; 303 return 0;
328} 304}
329 305
@@ -830,16 +806,16 @@ nouveau_gpuobj_suspend(struct drm_device *dev)
830 } 806 }
831 807
832 list_for_each_entry(gpuobj, &dev_priv->gpuobj_list, list) { 808 list_for_each_entry(gpuobj, &dev_priv->gpuobj_list, list) {
833 if (!gpuobj->im_backing || (gpuobj->flags & NVOBJ_FLAG_FAKE)) 809 if (!gpuobj->im_backing)
834 continue; 810 continue;
835 811
836 gpuobj->im_backing_suspend = vmalloc(gpuobj->im_pramin->size); 812 gpuobj->im_backing_suspend = vmalloc(gpuobj->size);
837 if (!gpuobj->im_backing_suspend) { 813 if (!gpuobj->im_backing_suspend) {
838 nouveau_gpuobj_resume(dev); 814 nouveau_gpuobj_resume(dev);
839 return -ENOMEM; 815 return -ENOMEM;
840 } 816 }
841 817
842 for (i = 0; i < gpuobj->im_pramin->size; i += 4) 818 for (i = 0; i < gpuobj->size; i += 4)
843 gpuobj->im_backing_suspend[i/4] = nv_ro32(gpuobj, i); 819 gpuobj->im_backing_suspend[i/4] = nv_ro32(gpuobj, i);
844 } 820 }
845 821
@@ -885,7 +861,7 @@ nouveau_gpuobj_resume(struct drm_device *dev)
885 if (!gpuobj->im_backing_suspend) 861 if (!gpuobj->im_backing_suspend)
886 continue; 862 continue;
887 863
888 for (i = 0; i < gpuobj->im_pramin->size; i += 4) 864 for (i = 0; i < gpuobj->size; i += 4)
889 nv_wo32(gpuobj, i, gpuobj->im_backing_suspend[i/4]); 865 nv_wo32(gpuobj, i, gpuobj->im_backing_suspend[i/4]);
890 dev_priv->engine.instmem.flush(dev); 866 dev_priv->engine.instmem.flush(dev);
891 } 867 }