drm/nouveau/mem: handle dll_off for ddr2/ddr3

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>

1 files changed, 23 insertions, 11 deletions

diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index e4ba4abca31a..8ff0027302a6 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -735,8 +735,6 @@ nouveau_mem_gddr3_mr(struct drm_device *dev, u32 freq,
                      struct nouveau_pm_memtiming *boot,
                      struct nouveau_pm_memtiming *t)
 {
-        u8 rver, rlen, *ramcfg = nouveau_perf_ramcfg(dev, freq, &rver, &rlen);
-
         if (len < 15) {
                 t->drive_strength = boot->drive_strength;
                 t->odt = boot->odt;
@@ -765,17 +763,9 @@ nouveau_mem_gddr3_mr(struct drm_device *dev, u32 freq,
                    /* CAS */
                    ((nv_mem_cl_lut_gddr3[e->tCL] & 0x7) << 4) |
                    ((nv_mem_cl_lut_gddr3[e->tCL] & 0x8) >> 2);
-
         t->mr[1] = (boot->mr[1] & 0x100f40) | t->drive_strength |
                    (t->odt << 2) |
                    (nv_mem_wr_lut_gddr3[e->tWR] & 0xf) << 4;
-        if (ramcfg && rver == 0x00) {
-                /* DLL enable/disable */
-                t->mr[1] &= ~0x00000040;
-                if (ramcfg[3] & 0x08)
-                        t->mr[1] |= 0x00000040;
-        }
-
         t->mr[2] = boot->mr[2];
 
         NV_DEBUG(dev, "(%u) MR: %08x %08x %08x", t->id,
@@ -832,7 +822,7 @@ nouveau_mem_timing_calc(struct drm_device *dev, u32 freq,
         struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
         struct nouveau_pm_memtiming *boot = &pm->boot.timing;
         struct nouveau_pm_tbl_entry *e;
-        u8 ver, len, *ptr;
+        u8 ver, len, *ptr, *ramcfg;
         int ret;
 
         ptr = nouveau_perf_timing(dev, freq, &ver, &len);
@@ -874,6 +864,28 @@ nouveau_mem_timing_calc(struct drm_device *dev, u32 freq,
                 break;
         default:
                 ret = -EINVAL;
+                break;
+        }
+
+        ramcfg = nouveau_perf_ramcfg(dev, freq, &ver, &len);
+        if (ramcfg) {
+                int dll_off;
+
+                if (ver == 0x00)
+                        dll_off = !!(ramcfg[3] & 0x04);
+                else
+                        dll_off = !!(ramcfg[2] & 0x40);
+
+                switch (dev_priv->vram_type) {
+                case NV_MEM_TYPE_GDDR3:
+                        t->mr[1] &= ~0x00000040;
+                        t->mr[1] |=  0x00000040 * dll_off;
+                        break;
+                default:
+                        t->mr[1] &= ~0x00000001;
+                        t->mr[1] |=  0x00000001 * dll_off;
+                        break;
+                }
         }
 
         return ret;