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authorIngo Molnar <mingo@elte.hu>2010-04-15 03:35:24 -0400
committerIngo Molnar <mingo@elte.hu>2010-04-15 03:36:16 -0400
commitb257c14ceb1194a6181144210056d38f22127189 (patch)
treec803925f1d5bf2237e7495d306bf43929df0c952 /drivers/gpu/drm/nouveau/nouveau_gem.c
parent371fd7e7a56a5c136d31aa980011bd2f131c3ef5 (diff)
parent2ba3abd8186f24c7fb418927025b4e2120e3a362 (diff)
Merge branch 'linus' into sched/core
Merge reason: merge the latest fixes, update to -rc4. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_gem.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_gem.c55
1 files changed, 25 insertions, 30 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 0d22f66f1c79..1bc0b38a5167 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -180,40 +180,35 @@ nouveau_gem_set_domain(struct drm_gem_object *gem, uint32_t read_domains,
180{ 180{
181 struct nouveau_bo *nvbo = gem->driver_private; 181 struct nouveau_bo *nvbo = gem->driver_private;
182 struct ttm_buffer_object *bo = &nvbo->bo; 182 struct ttm_buffer_object *bo = &nvbo->bo;
183 uint64_t flags; 183 uint32_t domains = valid_domains &
184 (write_domains ? write_domains : read_domains);
185 uint32_t pref_flags = 0, valid_flags = 0;
184 186
185 if (!valid_domains || (!read_domains && !write_domains)) 187 if (!domains)
186 return -EINVAL; 188 return -EINVAL;
187 189
188 if (write_domains) { 190 if (valid_domains & NOUVEAU_GEM_DOMAIN_VRAM)
189 if ((valid_domains & NOUVEAU_GEM_DOMAIN_VRAM) && 191 valid_flags |= TTM_PL_FLAG_VRAM;
190 (write_domains & NOUVEAU_GEM_DOMAIN_VRAM)) 192
191 flags = TTM_PL_FLAG_VRAM; 193 if (valid_domains & NOUVEAU_GEM_DOMAIN_GART)
192 else 194 valid_flags |= TTM_PL_FLAG_TT;
193 if ((valid_domains & NOUVEAU_GEM_DOMAIN_GART) && 195
194 (write_domains & NOUVEAU_GEM_DOMAIN_GART)) 196 if ((domains & NOUVEAU_GEM_DOMAIN_VRAM) &&
195 flags = TTM_PL_FLAG_TT; 197 bo->mem.mem_type == TTM_PL_VRAM)
196 else 198 pref_flags |= TTM_PL_FLAG_VRAM;
197 return -EINVAL; 199
198 } else { 200 else if ((domains & NOUVEAU_GEM_DOMAIN_GART) &&
199 if ((valid_domains & NOUVEAU_GEM_DOMAIN_VRAM) && 201 bo->mem.mem_type == TTM_PL_TT)
200 (read_domains & NOUVEAU_GEM_DOMAIN_VRAM) && 202 pref_flags |= TTM_PL_FLAG_TT;
201 bo->mem.mem_type == TTM_PL_VRAM) 203
202 flags = TTM_PL_FLAG_VRAM; 204 else if (domains & NOUVEAU_GEM_DOMAIN_VRAM)
203 else 205 pref_flags |= TTM_PL_FLAG_VRAM;
204 if ((valid_domains & NOUVEAU_GEM_DOMAIN_GART) && 206
205 (read_domains & NOUVEAU_GEM_DOMAIN_GART) && 207 else
206 bo->mem.mem_type == TTM_PL_TT) 208 pref_flags |= TTM_PL_FLAG_TT;
207 flags = TTM_PL_FLAG_TT; 209
208 else 210 nouveau_bo_placement_set(nvbo, pref_flags, valid_flags);
209 if ((valid_domains & NOUVEAU_GEM_DOMAIN_VRAM) &&
210 (read_domains & NOUVEAU_GEM_DOMAIN_VRAM))
211 flags = TTM_PL_FLAG_VRAM;
212 else
213 flags = TTM_PL_FLAG_TT;
214 }
215 211
216 nouveau_bo_placement_set(nvbo, flags);
217 return 0; 212 return 0;
218} 213}
219 214