drm/nv50: add a memory barrier to pushbuf submission

- This is useful for vram pushbuffers that are write combined.
- pre-nv50 has one too (in WRITE_PUT).

Signed-off-by: Maarten Maathuis <madman2003@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

1 files changed, 5 insertions, 0 deletions

diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c
index c8482a108a78..65c441a1999f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.c
@@ -190,6 +190,11 @@ nv50_dma_push(struct nouveau_channel *chan, struct nouveau_bo *bo,
         nouveau_bo_wr32(pb, ip++, upper_32_bits(offset) | length << 8);
 
         chan->dma.ib_put = (chan->dma.ib_put + 1) & chan->dma.ib_max;
+
+        DRM_MEMORYBARRIER();
+        /* Flush writes. */
+        nouveau_bo_rd32(pb, 0);
+
         nvchan_wr32(chan, 0x8c, chan->dma.ib_put);
         chan->dma.ib_free--;
 }