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authorBen Skeggs <bskeggs@redhat.com>2010-09-01 01:24:34 -0400
committerBen Skeggs <bskeggs@redhat.com>2010-09-24 02:22:42 -0400
commitfbd2895e45aebdb3d3ea73a3a796cf3bb9c912da (patch)
tree1939bf1e1f66d6f7b4e7528e7105b5a0517822eb /drivers/gpu/drm/nouveau/nouveau_bo.c
parent6c3d7ef25e3b4a0ea511b1e9d4a0a212750874a6 (diff)
drm/nouveau: rework init ordering so nv50_instmem.c can be less bad
Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_bo.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bo.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 841c63f28867..8e4a9bce4f3b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -403,7 +403,10 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
403 man->available_caching = TTM_PL_FLAG_UNCACHED | 403 man->available_caching = TTM_PL_FLAG_UNCACHED |
404 TTM_PL_FLAG_WC; 404 TTM_PL_FLAG_WC;
405 man->default_caching = TTM_PL_FLAG_WC; 405 man->default_caching = TTM_PL_FLAG_WC;
406 man->gpu_offset = dev_priv->vm_vram_base; 406 if (dev_priv->card_type == NV_50)
407 man->gpu_offset = 0x40000000;
408 else
409 man->gpu_offset = 0;
407 break; 410 break;
408 case TTM_PL_TT: 411 case TTM_PL_TT:
409 switch (dev_priv->gart_info.type) { 412 switch (dev_priv->gart_info.type) {