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authorLinus Torvalds <torvalds@linux-foundation.org>2010-04-09 14:50:01 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-04-09 14:50:01 -0400
commit2f10ffcfb28beb35137d9e86992c771b4a6c5f2a (patch)
tree67c7fc0b97e3125262616bdfcaec4eed816c09b4 /drivers/gpu/drm/nouveau/nouveau_bo.c
parentce82653d6cfcc95ba88c25908664878459fb1b8d (diff)
parent930b9d94579fa1ea9604cbf7ba56cedf99ba9b5c (diff)
Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (29 commits) drm/nouveau: bail out of auxch transaction if we repeatedly recieve defers drm/nv50: implement gpio set/get routines drm/nv50: parse/use some more de-magiced parts of gpio table entries drm/nouveau: store raw gpio table entry in bios gpio structs drm/nv40: Init some tiling-related PGRAPH state. drm/nv50: Add NVA3 support in ctxprog/ctxvals generator. drm/nv50: another dodgy DP hack drm/nv50: punt hotplug irq handling out to workqueue drm/nv50: preserve an unknown SOR_MODECTRL value for DP encoders drm/nv50: Allow using the NVA3 new compute class. drm/nv50: cleanup properly if PDISPLAY init fails drm/nouveau: fixup the init failure paths some more drm/nv50: fix instmem init on IGPs if stolen mem crosses 4GiB mark drm/nv40: add LVDS table quirk for Dell Latitude D620 drm/nv40: rework lvds table parsing drm/nouveau: detect vram amount once, and save the value drm/nouveau: remove some unused members from drm_nouveau_private drm/nouveau: Make use of TTM busy_placements. drm/nv50: add more 0x100c80 flushy magic drm/nv50: fix fbcon when framebuffer above 4GiB mark ...
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_bo.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bo.c67
1 files changed, 36 insertions, 31 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 9042dd7fb058..957d17629840 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -72,7 +72,7 @@ nouveau_bo_fixup_align(struct drm_device *dev,
72 * many small buffers. 72 * many small buffers.
73 */ 73 */
74 if (dev_priv->card_type == NV_50) { 74 if (dev_priv->card_type == NV_50) {
75 uint32_t block_size = nouveau_mem_fb_amount(dev) >> 15; 75 uint32_t block_size = dev_priv->vram_size >> 15;
76 int i; 76 int i;
77 77
78 switch (tile_flags) { 78 switch (tile_flags) {
@@ -154,7 +154,7 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
154 154
155 nvbo->placement.fpfn = 0; 155 nvbo->placement.fpfn = 0;
156 nvbo->placement.lpfn = mappable ? dev_priv->fb_mappable_pages : 0; 156 nvbo->placement.lpfn = mappable ? dev_priv->fb_mappable_pages : 0;
157 nouveau_bo_placement_set(nvbo, flags); 157 nouveau_bo_placement_set(nvbo, flags, 0);
158 158
159 nvbo->channel = chan; 159 nvbo->channel = chan;
160 ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size, 160 ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size,
@@ -173,26 +173,33 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
173 return 0; 173 return 0;
174} 174}
175 175
176static void
177set_placement_list(uint32_t *pl, unsigned *n, uint32_t type, uint32_t flags)
178{
179 *n = 0;
180
181 if (type & TTM_PL_FLAG_VRAM)
182 pl[(*n)++] = TTM_PL_FLAG_VRAM | flags;
183 if (type & TTM_PL_FLAG_TT)
184 pl[(*n)++] = TTM_PL_FLAG_TT | flags;
185 if (type & TTM_PL_FLAG_SYSTEM)
186 pl[(*n)++] = TTM_PL_FLAG_SYSTEM | flags;
187}
188
176void 189void
177nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t memtype) 190nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t type, uint32_t busy)
178{ 191{
179 int n = 0; 192 struct ttm_placement *pl = &nvbo->placement;
180 193 uint32_t flags = TTM_PL_MASK_CACHING |
181 if (memtype & TTM_PL_FLAG_VRAM) 194 (nvbo->pin_refcnt ? TTM_PL_FLAG_NO_EVICT : 0);
182 nvbo->placements[n++] = TTM_PL_FLAG_VRAM | TTM_PL_MASK_CACHING; 195
183 if (memtype & TTM_PL_FLAG_TT) 196 pl->placement = nvbo->placements;
184 nvbo->placements[n++] = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING; 197 set_placement_list(nvbo->placements, &pl->num_placement,
185 if (memtype & TTM_PL_FLAG_SYSTEM) 198 type, flags);
186 nvbo->placements[n++] = TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING; 199
187 nvbo->placement.placement = nvbo->placements; 200 pl->busy_placement = nvbo->busy_placements;
188 nvbo->placement.busy_placement = nvbo->placements; 201 set_placement_list(nvbo->busy_placements, &pl->num_busy_placement,
189 nvbo->placement.num_placement = n; 202 type | busy, flags);
190 nvbo->placement.num_busy_placement = n;
191
192 if (nvbo->pin_refcnt) {
193 while (n--)
194 nvbo->placements[n] |= TTM_PL_FLAG_NO_EVICT;
195 }
196} 203}
197 204
198int 205int
@@ -200,7 +207,7 @@ nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype)
200{ 207{
201 struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev); 208 struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
202 struct ttm_buffer_object *bo = &nvbo->bo; 209 struct ttm_buffer_object *bo = &nvbo->bo;
203 int ret, i; 210 int ret;
204 211
205 if (nvbo->pin_refcnt && !(memtype & (1 << bo->mem.mem_type))) { 212 if (nvbo->pin_refcnt && !(memtype & (1 << bo->mem.mem_type))) {
206 NV_ERROR(nouveau_bdev(bo->bdev)->dev, 213 NV_ERROR(nouveau_bdev(bo->bdev)->dev,
@@ -216,9 +223,7 @@ nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype)
216 if (ret) 223 if (ret)
217 goto out; 224 goto out;
218 225
219 nouveau_bo_placement_set(nvbo, memtype); 226 nouveau_bo_placement_set(nvbo, memtype, 0);
220 for (i = 0; i < nvbo->placement.num_placement; i++)
221 nvbo->placements[i] |= TTM_PL_FLAG_NO_EVICT;
222 227
223 ret = ttm_bo_validate(bo, &nvbo->placement, false, false); 228 ret = ttm_bo_validate(bo, &nvbo->placement, false, false);
224 if (ret == 0) { 229 if (ret == 0) {
@@ -245,7 +250,7 @@ nouveau_bo_unpin(struct nouveau_bo *nvbo)
245{ 250{
246 struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev); 251 struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
247 struct ttm_buffer_object *bo = &nvbo->bo; 252 struct ttm_buffer_object *bo = &nvbo->bo;
248 int ret, i; 253 int ret;
249 254
250 if (--nvbo->pin_refcnt) 255 if (--nvbo->pin_refcnt)
251 return 0; 256 return 0;
@@ -254,8 +259,7 @@ nouveau_bo_unpin(struct nouveau_bo *nvbo)
254 if (ret) 259 if (ret)
255 return ret; 260 return ret;
256 261
257 for (i = 0; i < nvbo->placement.num_placement; i++) 262 nouveau_bo_placement_set(nvbo, bo->mem.placement, 0);
258 nvbo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT;
259 263
260 ret = ttm_bo_validate(bo, &nvbo->placement, false, false); 264 ret = ttm_bo_validate(bo, &nvbo->placement, false, false);
261 if (ret == 0) { 265 if (ret == 0) {
@@ -396,8 +400,8 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
396 man->io_addr = NULL; 400 man->io_addr = NULL;
397 man->io_offset = drm_get_resource_start(dev, 1); 401 man->io_offset = drm_get_resource_start(dev, 1);
398 man->io_size = drm_get_resource_len(dev, 1); 402 man->io_size = drm_get_resource_len(dev, 1);
399 if (man->io_size > nouveau_mem_fb_amount(dev)) 403 if (man->io_size > dev_priv->vram_size)
400 man->io_size = nouveau_mem_fb_amount(dev); 404 man->io_size = dev_priv->vram_size;
401 405
402 man->gpu_offset = dev_priv->vm_vram_base; 406 man->gpu_offset = dev_priv->vm_vram_base;
403 break; 407 break;
@@ -440,10 +444,11 @@ nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
440 444
441 switch (bo->mem.mem_type) { 445 switch (bo->mem.mem_type) {
442 case TTM_PL_VRAM: 446 case TTM_PL_VRAM:
443 nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT); 447 nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT,
448 TTM_PL_FLAG_SYSTEM);
444 break; 449 break;
445 default: 450 default:
446 nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM); 451 nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM, 0);
447 break; 452 break;
448 } 453 }
449 454