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authorRob Clark <robdclark@gmail.com>2013-11-16 12:56:06 -0500
committerRob Clark <robdclark@gmail.com>2014-01-09 14:38:58 -0500
commit871d812aa43e6350a4edf41bf7cb0879675255f1 (patch)
treea1700a8c806367a0f85b199f620aed2441277b8b /drivers/gpu/drm/msm/msm_gpu.c
parentbf2b33afb9ea1d9609767c70562610a686bdfbd7 (diff)
drm/msm: add support for non-IOMMU systems
Add a VRAM carveout that is used for systems which do not have an IOMMU. The VRAM carveout uses CMA. The arch code must setup a CMA pool for the device (preferrably in highmem.. a 256m-512m VRAM pool in lowmem is not cool). The user can configure the VRAM pool size using msm.vram module param. Technically, the abstraction of IOMMU behind msm_mmu is not strictly needed, but it simplifies the GEM code a bit, and will be useful later when I add support for a2xx devices with GPUMMU, so I decided to keep this part. It appears to be possible to configure the GPU to restrict access to addresses within the VRAM pool, but this is not done yet. So for now the GPU will refuse to load if there is no sort of mmu. Once address based limits are supported and tested to confirm that we aren't giving the GPU access to arbitrary memory, this restriction can be lifted Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/msm_gpu.c')
-rw-r--r--drivers/gpu/drm/msm/msm_gpu.c19
1 files changed, 11 insertions, 8 deletions
diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c
index 71f105f0d897..4ebce8be489d 100644
--- a/drivers/gpu/drm/msm/msm_gpu.c
+++ b/drivers/gpu/drm/msm/msm_gpu.c
@@ -17,6 +17,7 @@
17 17
18#include "msm_gpu.h" 18#include "msm_gpu.h"
19#include "msm_gem.h" 19#include "msm_gem.h"
20#include "msm_mmu.h"
20 21
21 22
22/* 23/*
@@ -353,6 +354,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
353 struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs, 354 struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs,
354 const char *name, const char *ioname, const char *irqname, int ringsz) 355 const char *name, const char *ioname, const char *irqname, int ringsz)
355{ 356{
357 struct iommu_domain *iommu;
356 int i, ret; 358 int i, ret;
357 359
358 gpu->dev = drm; 360 gpu->dev = drm;
@@ -418,13 +420,14 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
418 * and have separate page tables per context. For now, to keep things 420 * and have separate page tables per context. For now, to keep things
419 * simple and to get something working, just use a single address space: 421 * simple and to get something working, just use a single address space:
420 */ 422 */
421 gpu->iommu = iommu_domain_alloc(&platform_bus_type); 423 iommu = iommu_domain_alloc(&platform_bus_type);
422 if (!gpu->iommu) { 424 if (iommu) {
423 dev_err(drm->dev, "failed to allocate IOMMU\n"); 425 dev_info(drm->dev, "%s: using IOMMU\n", name);
424 ret = -ENOMEM; 426 gpu->mmu = msm_iommu_new(drm, iommu);
425 goto fail; 427 } else {
428 dev_info(drm->dev, "%s: no IOMMU, fallback to VRAM carveout!\n", name);
426 } 429 }
427 gpu->id = msm_register_iommu(drm, gpu->iommu); 430 gpu->id = msm_register_mmu(drm, gpu->mmu);
428 431
429 /* Create ringbuffer: */ 432 /* Create ringbuffer: */
430 gpu->rb = msm_ringbuffer_new(gpu, ringsz); 433 gpu->rb = msm_ringbuffer_new(gpu, ringsz);
@@ -464,6 +467,6 @@ void msm_gpu_cleanup(struct msm_gpu *gpu)
464 msm_ringbuffer_destroy(gpu->rb); 467 msm_ringbuffer_destroy(gpu->rb);
465 } 468 }
466 469
467 if (gpu->iommu) 470 if (gpu->mmu)
468 iommu_domain_free(gpu->iommu); 471 gpu->mmu->funcs->destroy(gpu->mmu);
469} 472}