Merge commit 'v2.6.38-rc4' into imx-for-2.6.39

Conflicts:
	arch/arm/mach-mxs/clock-mx28.c

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

14 files changed, 225 insertions, 86 deletions

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 844f3c972b04..17bd766f2081 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -152,7 +152,7 @@ static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)
 {
         drm_i915_private_t *dev_priv = dev->dev_private;
         struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
-        struct intel_ring_buffer *ring = LP_RING(dev_priv);
+        int ret;
 
         master_priv->sarea = drm_getsarea(dev);
         if (master_priv->sarea) {
@@ -163,33 +163,22 @@ static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)
         }
 
         if (init->ring_size != 0) {
-                if (ring->obj != NULL) {
+                if (LP_RING(dev_priv)->obj != NULL) {
                         i915_dma_cleanup(dev);
                         DRM_ERROR("Client tried to initialize ringbuffer in "
                                   "GEM mode\n");
                         return -EINVAL;
                 }
 
-                ring->size = init->ring_size;
-
-                ring->map.offset = init->ring_start;
-                ring->map.size = init->ring_size;
-                ring->map.type = 0;
-                ring->map.flags = 0;
-                ring->map.mtrr = 0;
-
-                drm_core_ioremap_wc(&ring->map, dev);
-
-                if (ring->map.handle == NULL) {
+                ret = intel_render_ring_init_dri(dev,
+                                                 init->ring_start,
+                                                 init->ring_size);
+                if (ret) {
                         i915_dma_cleanup(dev);
-                        DRM_ERROR("can not ioremap virtual address for"
-                                  " ring buffer\n");
-                        return -ENOMEM;
+                        return ret;
                 }
         }
 
-        ring->virtual_start = ring->map.handle;
-
         dev_priv->cpp = init->cpp;
         dev_priv->back_offset = init->back_offset;
         dev_priv->front_offset = init->front_offset;
@@ -1226,9 +1215,15 @@ static int i915_load_modeset_init(struct drm_device *dev)
         if (ret)
                 DRM_INFO("failed to find VBIOS tables\n");
 
-        /* if we have > 1 VGA cards, then disable the radeon VGA resources */
+        /* If we have > 1 VGA cards, then we need to arbitrate access
+         * to the common VGA resources.
+         *
+         * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
+         * then we do not take part in VGA arbitration and the
+         * vga_client_register() fails with -ENODEV.
+         */
         ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode);
-        if (ret)
+        if (ret && ret != -ENODEV)
                 goto cleanup_ringbuffer;
 
         intel_register_dsm_handler();
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 72fea2bcfc4f..cfb56d0ff367 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -60,7 +60,7 @@ extern int intel_agp_enabled;
 
 #define INTEL_VGA_DEVICE(id, info) {            \
         .class = PCI_CLASS_DISPLAY_VGA << 8,    \
-        .class_mask = 0xffff00,                 \
+        .class_mask = 0xff0000,                 \
         .vendor = 0x8086,                       \
         .device = id,                           \
         .subvendor = PCI_ANY_ID,                \
@@ -354,6 +354,7 @@ static int i915_drm_thaw(struct drm_device *dev)
                 error = i915_gem_init_ringbuffer(dev);
                 mutex_unlock(&dev->struct_mutex);
 
+                drm_mode_config_reset(dev);
                 drm_irq_install(dev);
 
                 /* Resume the modeset for every activated CRTC */
@@ -542,6 +543,7 @@ int i915_reset(struct drm_device *dev, u8 flags)
 
                 mutex_unlock(&dev->struct_mutex);
                 drm_irq_uninstall(dev);
+                drm_mode_config_reset(dev);
                 drm_irq_install(dev);
                 mutex_lock(&dev->struct_mutex);
         }
@@ -566,6 +568,14 @@ int i915_reset(struct drm_device *dev, u8 flags)
 static int __devinit
 i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
+        /* Only bind to function 0 of the device. Early generations
+         * used function 1 as a placeholder for multi-head. This causes
+         * us confusion instead, especially on the systems where both
+         * functions have the same PCI-ID!
+         */
+        if (PCI_FUNC(pdev->devfn))
+                return -ENODEV;
+
         return drm_get_pci_dev(pdev, ent, &driver);
 }
 
@@ -752,6 +762,9 @@ static int __init i915_init(void)
                 driver.driver_features &= ~DRIVER_MODESET;
 #endif
 
+        if (!(driver.driver_features & DRIVER_MODESET))
+                driver.get_vblank_timestamp = NULL;
+
         return drm_init(&driver);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5969f46ac2d6..a0149c619cdd 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -543,8 +543,11 @@ typedef struct drm_i915_private {
                 /** List of all objects in gtt_space. Used to restore gtt
                  * mappings on resume */
                 struct list_head gtt_list;
-                /** End of mappable part of GTT */
+
+                /** Usable portion of the GTT for GEM */
+                unsigned long gtt_start;
                 unsigned long gtt_mappable_end;
+                unsigned long gtt_end;
 
                 struct io_mapping *gtt_mapping;
                 int gtt_mtrr;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 3dfc848ff755..cf4f74c7c6fb 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -140,12 +140,16 @@ void i915_gem_do_init(struct drm_device *dev,
 {
         drm_i915_private_t *dev_priv = dev->dev_private;
 
-        drm_mm_init(&dev_priv->mm.gtt_space, start,
-                    end - start);
+        drm_mm_init(&dev_priv->mm.gtt_space, start, end - start);
 
+        dev_priv->mm.gtt_start = start;
+        dev_priv->mm.gtt_mappable_end = mappable_end;
+        dev_priv->mm.gtt_end = end;
         dev_priv->mm.gtt_total = end - start;
         dev_priv->mm.mappable_gtt_total = min(end, mappable_end) - start;
-        dev_priv->mm.gtt_mappable_end = mappable_end;
+
+        /* Take over this portion of the GTT */
+        intel_gtt_clear_range(start / PAGE_SIZE, (end-start) / PAGE_SIZE);
 }
 
 int
@@ -1857,7 +1861,7 @@ i915_gem_retire_requests_ring(struct drm_device *dev,
 
         seqno = ring->get_seqno(ring);
 
-        for (i = 0; i < I915_NUM_RINGS; i++)
+        for (i = 0; i < ARRAY_SIZE(ring->sync_seqno); i++)
                 if (seqno >= ring->sync_seqno[i])
                         ring->sync_seqno[i] = 0;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index dcfdf4151b6d..d2f445e825f2 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1175,7 +1175,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
                 goto err;
 
         seqno = i915_gem_next_request_seqno(dev, ring);
-        for (i = 0; i < I915_NUM_RINGS-1; i++) {
+        for (i = 0; i < ARRAY_SIZE(ring->sync_seqno); i++) {
                 if (seqno < ring->sync_seqno[i]) {
                         /* The GPU can not handle its semaphore value wrapping,
                          * so every billion or so execbuffers, we need to stall
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 70433ae50ac8..b0abdc64aa9f 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -34,6 +34,10 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
         struct drm_i915_private *dev_priv = dev->dev_private;
         struct drm_i915_gem_object *obj;
 
+        /* First fill our portion of the GTT with scratch pages */
+        intel_gtt_clear_range(dev_priv->mm.gtt_start / PAGE_SIZE,
+                              (dev_priv->mm.gtt_end - dev_priv->mm.gtt_start) / PAGE_SIZE);
+
         list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
                 i915_gem_clflush_object(obj);
 
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b8e509ae065e..97f946dcc1aa 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -274,24 +274,35 @@ int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
         return ret;
 }
 
-int i915_get_vblank_timestamp(struct drm_device *dev, int crtc,
+int i915_get_vblank_timestamp(struct drm_device *dev, int pipe,
                               int *max_error,
                               struct timeval *vblank_time,
                               unsigned flags)
 {
-        struct drm_crtc *drmcrtc;
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        struct drm_crtc *crtc;
 
-        if (crtc < 0 || crtc >= dev->num_crtcs) {
-                DRM_ERROR("Invalid crtc %d\n", crtc);
+        if (pipe < 0 || pipe >= dev_priv->num_pipe) {
+                DRM_ERROR("Invalid crtc %d\n", pipe);
                 return -EINVAL;
         }
 
         /* Get drm_crtc to timestamp: */
-        drmcrtc = intel_get_crtc_for_pipe(dev, crtc);
+        crtc = intel_get_crtc_for_pipe(dev, pipe);
+        if (crtc == NULL) {
+                DRM_ERROR("Invalid crtc %d\n", pipe);
+                return -EINVAL;
+        }
+
+        if (!crtc->enabled) {
+                DRM_DEBUG_KMS("crtc %d is disabled\n", pipe);
+                return -EBUSY;
+        }
 
         /* Helper routine in DRM core does all the work: */
-        return drm_calc_vbltimestamp_from_scanoutpos(dev, crtc, max_error,
-                                                     vblank_time, flags, drmcrtc);
+        return drm_calc_vbltimestamp_from_scanoutpos(dev, pipe, max_error,
+                                                     vblank_time, flags,
+                                                     crtc);
 }
 
 /*
@@ -348,8 +359,12 @@ static void notify_ring(struct drm_device *dev,
                         struct intel_ring_buffer *ring)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
-        u32 seqno = ring->get_seqno(ring);
+        u32 seqno;
 
+        if (ring->obj == NULL)
+                return;
+
+        seqno = ring->get_seqno(ring);
         trace_i915_gem_request_complete(dev, seqno);
 
         ring->irq_seqno = seqno;
@@ -831,6 +846,8 @@ static void i915_capture_error_state(struct drm_device *dev)
                 i++;
         error->pinned_bo_count = i - error->active_bo_count;
 
+        error->active_bo = NULL;
+        error->pinned_bo = NULL;
         if (i) {
                 error->active_bo = kmalloc(sizeof(*error->active_bo)*i,
                                            GFP_ATOMIC);
@@ -1179,18 +1196,18 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
                                 intel_finish_page_flip_plane(dev, 1);
                 }
 
-                if (pipea_stats & vblank_status) {
+                if (pipea_stats & vblank_status &&
+                    drm_handle_vblank(dev, 0)) {
                         vblank++;
-                        drm_handle_vblank(dev, 0);
                         if (!dev_priv->flip_pending_is_done) {
                                 i915_pageflip_stall_check(dev, 0);
                                 intel_finish_page_flip(dev, 0);
                         }
                 }
 
-                if (pipeb_stats & vblank_status) {
+                if (pipeb_stats & vblank_status &&
+                    drm_handle_vblank(dev, 1)) {
                         vblank++;
-                        drm_handle_vblank(dev, 1);
                         if (!dev_priv->flip_pending_is_done) {
                                 i915_pageflip_stall_check(dev, 1);
                                 intel_finish_page_flip(dev, 1);
@@ -1278,12 +1295,12 @@ static int i915_wait_irq(struct drm_device * dev, int irq_nr)
         if (master_priv->sarea_priv)
                 master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
 
-        ret = -ENODEV;
         if (ring->irq_get(ring)) {
                 DRM_WAIT_ON(ret, ring->irq_queue, 3 * DRM_HZ,
                             READ_BREADCRUMB(dev_priv) >= irq_nr);
                 ring->irq_put(ring);
-        }
+        } else if (wait_for(READ_BREADCRUMB(dev_priv) >= irq_nr, 3000))
+                ret = -EBUSY;
 
         if (ret == -EBUSY) {
                 DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 40a407f41f61..5cfc68940f17 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -513,6 +513,10 @@
 #define   GEN6_BLITTER_SYNC_STATUS                      (1 << 24)
 #define   GEN6_BLITTER_USER_INTERRUPT                   (1 << 22)
 
+#define GEN6_BLITTER_ECOSKPD    0x221d0
+#define   GEN6_BLITTER_LOCK_SHIFT                       16
+#define   GEN6_BLITTER_FBC_NOTIFY                       (1<<3)
+
 #define GEN6_BSD_SLEEP_PSMI_CONTROL     0x12050
 #define   GEN6_BSD_SLEEP_PSMI_CONTROL_RC_ILDL_MESSAGE_MODIFY_MASK       (1 << 16)
 #define   GEN6_BSD_SLEEP_PSMI_CONTROL_RC_ILDL_MESSAGE_DISABLE           (1 << 0)
@@ -2626,6 +2630,8 @@
 #define DISPLAY_PORT_PLL_BIOS_2         0x46014
 
 #define PCH_DSPCLK_GATE_D       0x42020
+# define DPFCUNIT_CLOCK_GATE_DISABLE            (1 << 9)
+# define DPFCRUNIT_CLOCK_GATE_DISABLE           (1 << 8)
 # define DPFDUNIT_CLOCK_GATE_DISABLE            (1 << 7)
 # define DPARBUNIT_CLOCK_GATE_DISABLE           (1 << 5)
 
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 17035b87ee46..8a77ff4a7237 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -535,6 +535,15 @@ static int intel_crt_set_property(struct drm_connector *connector,
         return 0;
 }
 
+static void intel_crt_reset(struct drm_connector *connector)
+{
+        struct drm_device *dev = connector->dev;
+        struct intel_crt *crt = intel_attached_crt(connector);
+
+        if (HAS_PCH_SPLIT(dev))
+                crt->force_hotplug_required = 1;
+}
+
 /*
  * Routines for controlling stuff on the analog port
  */
@@ -548,6 +557,7 @@ static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
 };
 
 static const struct drm_connector_funcs intel_crt_connector_funcs = {
+        .reset = intel_crt_reset,
         .dpms = drm_helper_connector_dpms,
         .detect = intel_crt_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 98967f3b7724..7e42aa586504 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1213,6 +1213,26 @@ static bool g4x_fbc_enabled(struct drm_device *dev)
         return I915_READ(DPFC_CONTROL) & DPFC_CTL_EN;
 }
 
+static void sandybridge_blit_fbc_update(struct drm_device *dev)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        u32 blt_ecoskpd;
+
+        /* Make sure blitter notifies FBC of writes */
+        __gen6_force_wake_get(dev_priv);
+        blt_ecoskpd = I915_READ(GEN6_BLITTER_ECOSKPD);
+        blt_ecoskpd |= GEN6_BLITTER_FBC_NOTIFY <<
+                GEN6_BLITTER_LOCK_SHIFT;
+        I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd);
+        blt_ecoskpd |= GEN6_BLITTER_FBC_NOTIFY;
+        I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd);
+        blt_ecoskpd &= ~(GEN6_BLITTER_FBC_NOTIFY <<
+                         GEN6_BLITTER_LOCK_SHIFT);
+        I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd);
+        POSTING_READ(GEN6_BLITTER_ECOSKPD);
+        __gen6_force_wake_put(dev_priv);
+}
+
 static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
 {
         struct drm_device *dev = crtc->dev;
@@ -1266,6 +1286,7 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
                 I915_WRITE(SNB_DPFC_CTL_SA,
                            SNB_CPU_FENCE_ENABLE | dev_priv->cfb_fence);
                 I915_WRITE(DPFC_CPU_FENCE_OFFSET, crtc->y);
+                sandybridge_blit_fbc_update(dev);
         }
 
         DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane);
@@ -5530,6 +5551,18 @@ cleanup_work:
         return ret;
 }
 
+static void intel_crtc_reset(struct drm_crtc *crtc)
+{
+        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+
+        /* Reset flags back to the 'unknown' status so that they
+         * will be correctly set on the initial modeset.
+         */
+        intel_crtc->cursor_addr = 0;
+        intel_crtc->dpms_mode = -1;
+        intel_crtc->active = true; /* force the pipe off on setup_init_config */
+}
+
 static struct drm_crtc_helper_funcs intel_helper_funcs = {
         .dpms = intel_crtc_dpms,
         .mode_fixup = intel_crtc_mode_fixup,
@@ -5541,6 +5574,7 @@ static struct drm_crtc_helper_funcs intel_helper_funcs = {
 };
 
 static const struct drm_crtc_funcs intel_crtc_funcs = {
+        .reset = intel_crtc_reset,
         .cursor_set = intel_crtc_cursor_set,
         .cursor_move = intel_crtc_cursor_move,
         .gamma_set = intel_crtc_gamma_set,
@@ -5631,9 +5665,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
         dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = &intel_crtc->base;
         dev_priv->pipe_to_crtc_mapping[intel_crtc->pipe] = &intel_crtc->base;
 
-        intel_crtc->cursor_addr = 0;
-        intel_crtc->dpms_mode = -1;
-        intel_crtc->active = true; /* force the pipe off on setup_init_config */
+        intel_crtc_reset(&intel_crtc->base);
 
         if (HAS_PCH_SPLIT(dev)) {
                 intel_helper_funcs.prepare = ironlake_crtc_prepare;
@@ -6286,7 +6318,9 @@ void intel_enable_clock_gating(struct drm_device *dev)
 
                 if (IS_GEN5(dev)) {
                         /* Required for FBC */
-                        dspclk_gate |= DPFDUNIT_CLOCK_GATE_DISABLE;
+                        dspclk_gate |= DPFCUNIT_CLOCK_GATE_DISABLE |
+                                DPFCRUNIT_CLOCK_GATE_DISABLE |
+                                DPFDUNIT_CLOCK_GATE_DISABLE;
                         /* Required for CxSR */
                         dspclk_gate |= DPARBUNIT_CLOCK_GATE_DISABLE;
 
diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
index f295a7aaadf9..64fd64443ca6 100644
--- a/drivers/gpu/drm/i915/intel_opregion.c
+++ b/drivers/gpu/drm/i915/intel_opregion.c
@@ -26,6 +26,7 @@
  */
 
 #include <linux/acpi.h>
+#include <linux/acpi_io.h>
 #include <acpi/video.h>
 
 #include "drmP.h"
@@ -476,7 +477,7 @@ int intel_opregion_setup(struct drm_device *dev)
                 return -ENOTSUPP;
         }
 
-        base = ioremap(asls, OPREGION_SIZE);
+        base = acpi_os_ioremap(asls, OPREGION_SIZE);
         if (!base)
                 return -ENOMEM;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 03e337072517..6218fa97aa1e 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -34,6 +34,14 @@
 #include "i915_trace.h"
 #include "intel_drv.h"
 
+static inline int ring_space(struct intel_ring_buffer *ring)
+{
+        int space = (ring->head & HEAD_ADDR) - (ring->tail + 8);
+        if (space < 0)
+                space += ring->size;
+        return space;
+}
+
 static u32 i915_gem_get_seqno(struct drm_device *dev)
 {
         drm_i915_private_t *dev_priv = dev->dev_private;
@@ -204,11 +212,9 @@ static int init_ring_common(struct intel_ring_buffer *ring)
         if (!drm_core_check_feature(ring->dev, DRIVER_MODESET))
                 i915_kernel_lost_context(ring->dev);
         else {
-                ring->head = I915_READ_HEAD(ring) & HEAD_ADDR;
+                ring->head = I915_READ_HEAD(ring);
                 ring->tail = I915_READ_TAIL(ring) & TAIL_ADDR;
-                ring->space = ring->head - (ring->tail + 8);
-                if (ring->space < 0)
-                        ring->space += ring->size;
+                ring->space = ring_space(ring);
         }
 
         return 0;
@@ -921,7 +927,7 @@ static int intel_wrap_ring_buffer(struct intel_ring_buffer *ring)
         }
 
         ring->tail = 0;
-        ring->space = ring->head - 8;
+        ring->space = ring_space(ring);
 
         return 0;
 }
@@ -933,20 +939,22 @@ int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n)
         unsigned long end;
         u32 head;
 
+        /* If the reported head position has wrapped or hasn't advanced,
+         * fallback to the slow and accurate path.
+         */
+        head = intel_read_status_page(ring, 4);
+        if (head > ring->head) {
+                ring->head = head;
+                ring->space = ring_space(ring);
+                if (ring->space >= n)
+                        return 0;
+        }
+
         trace_i915_ring_wait_begin (dev);
         end = jiffies + 3 * HZ;
         do {
-                /* If the reported head position has wrapped or hasn't advanced,
-                 * fallback to the slow and accurate path.
-                 */
-                head = intel_read_status_page(ring, 4);
-                if (head < ring->actual_head)
-                        head = I915_READ_HEAD(ring);
-                ring->actual_head = head;
-                ring->head = head & HEAD_ADDR;
-                ring->space = ring->head - (ring->tail + 8);
-                if (ring->space < 0)
-                        ring->space += ring->size;
+                ring->head = I915_READ_HEAD(ring);
+                ring->space = ring_space(ring);
                 if (ring->space >= n) {
                         trace_i915_ring_wait_end(dev);
                         return 0;
@@ -1291,6 +1299,48 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
         return intel_init_ring_buffer(dev, ring);
 }
 
+int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size)
+{
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        struct intel_ring_buffer *ring = &dev_priv->ring[RCS];
+
+        *ring = render_ring;
+        if (INTEL_INFO(dev)->gen >= 6) {
+                ring->add_request = gen6_add_request;
+                ring->irq_get = gen6_render_ring_get_irq;
+                ring->irq_put = gen6_render_ring_put_irq;
+        } else if (IS_GEN5(dev)) {
+                ring->add_request = pc_render_add_request;
+                ring->get_seqno = pc_render_get_seqno;
+        }
+
+        ring->dev = dev;
+        INIT_LIST_HEAD(&ring->active_list);
+        INIT_LIST_HEAD(&ring->request_list);
+        INIT_LIST_HEAD(&ring->gpu_write_list);
+
+        ring->size = size;
+        ring->effective_size = ring->size;
+        if (IS_I830(ring->dev))
+                ring->effective_size -= 128;
+
+        ring->map.offset = start;
+        ring->map.size = size;
+        ring->map.type = 0;
+        ring->map.flags = 0;
+        ring->map.mtrr = 0;
+
+        drm_core_ioremap_wc(&ring->map, dev);
+        if (ring->map.handle == NULL) {
+                DRM_ERROR("can not ioremap virtual address for"
+                          " ring buffer\n");
+                return -ENOMEM;
+        }
+
+        ring->virtual_start = (void __force __iomem *)ring->map.handle;
+        return 0;
+}
+
 int intel_init_bsd_ring_buffer(struct drm_device *dev)
 {
         drm_i915_private_t *dev_priv = dev->dev_private;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index be9087e4c9be..6d6fde85a636 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -47,7 +47,6 @@ struct  intel_ring_buffer {
         struct          drm_device *dev;
         struct          drm_i915_gem_object *obj;
 
-        u32             actual_head;
         u32             head;
         u32             tail;
         int             space;
@@ -167,4 +166,7 @@ int intel_init_blt_ring_buffer(struct drm_device *dev);
 u32 intel_ring_get_active_head(struct intel_ring_buffer *ring);
 void intel_ring_setup_status_page(struct intel_ring_buffer *ring);
 
+/* DRI warts */
+int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size);
+
 #endif /* _INTEL_RINGBUFFER_H_ */
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 45cd37652a37..6a09c1413d60 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -473,20 +473,6 @@ static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
                 return false;
         }
 
-        i = 3;
-        while (status == SDVO_CMD_STATUS_PENDING && i--) {
-                if (!intel_sdvo_read_byte(intel_sdvo,
-                                          SDVO_I2C_CMD_STATUS,
-                                          &status))
-                        return false;
-        }
-        if (status != SDVO_CMD_STATUS_SUCCESS) {
-                DRM_DEBUG_KMS("command returns response %s [%d]\n",
-                              status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP ? cmd_status_names[status] : "???",
-                              status);
-                return false;
-        }
-
         return true;
 }
 
@@ -497,6 +483,8 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
         u8 status;
         int i;
 
+        DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
+
         /*
          * The documentation states that all commands will be
          * processed within 15µs, and that we need only poll
@@ -505,14 +493,19 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
          *
          * Check 5 times in case the hardware failed to read the docs.
          */
-        do {
+        if (!intel_sdvo_read_byte(intel_sdvo,
+                                  SDVO_I2C_CMD_STATUS,
+                                  &status))
+                goto log_fail;
+
+        while (status == SDVO_CMD_STATUS_PENDING && retry--) {
+                udelay(15);
                 if (!intel_sdvo_read_byte(intel_sdvo,
                                           SDVO_I2C_CMD_STATUS,
                                           &status))
-                        return false;
-        } while (status == SDVO_CMD_STATUS_PENDING && --retry);
+                        goto log_fail;
+        }
 
-        DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
         else
@@ -533,7 +526,7 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
         return true;
 
 log_fail:
-        DRM_LOG_KMS("\n");
+        DRM_LOG_KMS("... failed\n");
         return false;
 }
 
@@ -550,6 +543,7 @@ static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
                                               u8 ddc_bus)
 {
+        /* This must be the immediately preceding write before the i2c xfer */
         return intel_sdvo_write_cmd(intel_sdvo,
                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
                                     &ddc_bus, 1);
@@ -557,7 +551,10 @@ static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 
 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 {
-        return intel_sdvo_write_cmd(intel_sdvo, cmd, data, len);
+        if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
+                return false;
+
+        return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 }
 
 static bool
@@ -859,18 +856,21 @@ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
 
         intel_dip_infoframe_csum(&avi_if);
 
-        if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
+        if (!intel_sdvo_set_value(intel_sdvo,
+                                  SDVO_CMD_SET_HBUF_INDEX,
                                   set_buf_index, 2))
                 return false;
 
         for (i = 0; i < sizeof(avi_if); i += 8) {
-                if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA,
+                if (!intel_sdvo_set_value(intel_sdvo,
+                                          SDVO_CMD_SET_HBUF_DATA,
                                           data, 8))
                         return false;
                 data++;
         }
 
-        return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE,
+        return intel_sdvo_set_value(intel_sdvo,
+                                    SDVO_CMD_SET_HBUF_TXRATE,
                                     &tx_rate, 1);
 }