diff options
author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2014-03-07 18:08:15 -0500 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-03-19 11:39:46 -0400 |
commit | 5d584b2eca96543568a8db8eba008f2dab784367 (patch) | |
tree | 4d52d0fb4bd986112faeeda285d33362a3e2d5b8 /drivers/gpu/drm/i915 | |
parent | 7c8615d8f9faf7a33ad528a012e097631599207f (diff) |
drm/i915: move pc8.irqs_disabled to pm.irqs_disabled
When other platforms add runtime PM support they will also need to
disable interrupts, so move the variable to the runtime PM struct.
Also notice that the longer-term goal is to completely kill the
regsave struct, and I even have patches for that.
v2: - Rebase.
v3: - Rebase.
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 58 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 3 |
7 files changed, 42 insertions, 41 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 2365bb299276..144b0ff0a3f5 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -2015,7 +2015,7 @@ static int i915_pc8_status(struct seq_file *m, void *unused) | |||
2015 | mutex_lock(&dev_priv->pc8.lock); | 2015 | mutex_lock(&dev_priv->pc8.lock); |
2016 | seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->mm.busy)); | 2016 | seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->mm.busy)); |
2017 | seq_printf(m, "IRQs disabled: %s\n", | 2017 | seq_printf(m, "IRQs disabled: %s\n", |
2018 | yesno(dev_priv->pc8.irqs_disabled)); | 2018 | yesno(dev_priv->pm.irqs_disabled)); |
2019 | mutex_unlock(&dev_priv->pc8.lock); | 2019 | mutex_unlock(&dev_priv->pc8.lock); |
2020 | 2020 | ||
2021 | return 0; | 2021 | return 0; |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 02102712465e..84a80b610afa 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -1390,8 +1390,12 @@ struct ilk_wm_values { | |||
1390 | * For more, read "Display Sequences for Package C8" on our documentation. | 1390 | * For more, read "Display Sequences for Package C8" on our documentation. |
1391 | */ | 1391 | */ |
1392 | struct i915_package_c8 { | 1392 | struct i915_package_c8 { |
1393 | bool irqs_disabled; | ||
1394 | struct mutex lock; | 1393 | struct mutex lock; |
1394 | }; | ||
1395 | |||
1396 | struct i915_runtime_pm { | ||
1397 | bool suspended; | ||
1398 | bool irqs_disabled; | ||
1395 | 1399 | ||
1396 | struct { | 1400 | struct { |
1397 | uint32_t deimr; | 1401 | uint32_t deimr; |
@@ -1402,10 +1406,6 @@ struct i915_package_c8 { | |||
1402 | } regsave; | 1406 | } regsave; |
1403 | }; | 1407 | }; |
1404 | 1408 | ||
1405 | struct i915_runtime_pm { | ||
1406 | bool suspended; | ||
1407 | }; | ||
1408 | |||
1409 | enum intel_pipe_crc_source { | 1409 | enum intel_pipe_crc_source { |
1410 | INTEL_PIPE_CRC_SOURCE_NONE, | 1410 | INTEL_PIPE_CRC_SOURCE_NONE, |
1411 | INTEL_PIPE_CRC_SOURCE_PLANE1, | 1411 | INTEL_PIPE_CRC_SOURCE_PLANE1, |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 338fa6799ecf..ee32759ffce3 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -1035,7 +1035,7 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno, | |||
1035 | unsigned long timeout_expire; | 1035 | unsigned long timeout_expire; |
1036 | int ret; | 1036 | int ret; |
1037 | 1037 | ||
1038 | WARN(dev_priv->pc8.irqs_disabled, "IRQs disabled\n"); | 1038 | WARN(dev_priv->pm.irqs_disabled, "IRQs disabled\n"); |
1039 | 1039 | ||
1040 | if (i915_seqno_passed(ring->get_seqno(ring, true), seqno)) | 1040 | if (i915_seqno_passed(ring->get_seqno(ring, true), seqno)) |
1041 | return 0; | 1041 | return 0; |
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index c8e262fc750a..1c00751eca69 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -86,9 +86,9 @@ ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask) | |||
86 | { | 86 | { |
87 | assert_spin_locked(&dev_priv->irq_lock); | 87 | assert_spin_locked(&dev_priv->irq_lock); |
88 | 88 | ||
89 | if (dev_priv->pc8.irqs_disabled) { | 89 | if (dev_priv->pm.irqs_disabled) { |
90 | WARN(1, "IRQs disabled\n"); | 90 | WARN(1, "IRQs disabled\n"); |
91 | dev_priv->pc8.regsave.deimr &= ~mask; | 91 | dev_priv->pm.regsave.deimr &= ~mask; |
92 | return; | 92 | return; |
93 | } | 93 | } |
94 | 94 | ||
@@ -104,9 +104,9 @@ ironlake_disable_display_irq(drm_i915_private_t *dev_priv, u32 mask) | |||
104 | { | 104 | { |
105 | assert_spin_locked(&dev_priv->irq_lock); | 105 | assert_spin_locked(&dev_priv->irq_lock); |
106 | 106 | ||
107 | if (dev_priv->pc8.irqs_disabled) { | 107 | if (dev_priv->pm.irqs_disabled) { |
108 | WARN(1, "IRQs disabled\n"); | 108 | WARN(1, "IRQs disabled\n"); |
109 | dev_priv->pc8.regsave.deimr |= mask; | 109 | dev_priv->pm.regsave.deimr |= mask; |
110 | return; | 110 | return; |
111 | } | 111 | } |
112 | 112 | ||
@@ -129,10 +129,10 @@ static void ilk_update_gt_irq(struct drm_i915_private *dev_priv, | |||
129 | { | 129 | { |
130 | assert_spin_locked(&dev_priv->irq_lock); | 130 | assert_spin_locked(&dev_priv->irq_lock); |
131 | 131 | ||
132 | if (dev_priv->pc8.irqs_disabled) { | 132 | if (dev_priv->pm.irqs_disabled) { |
133 | WARN(1, "IRQs disabled\n"); | 133 | WARN(1, "IRQs disabled\n"); |
134 | dev_priv->pc8.regsave.gtimr &= ~interrupt_mask; | 134 | dev_priv->pm.regsave.gtimr &= ~interrupt_mask; |
135 | dev_priv->pc8.regsave.gtimr |= (~enabled_irq_mask & | 135 | dev_priv->pm.regsave.gtimr |= (~enabled_irq_mask & |
136 | interrupt_mask); | 136 | interrupt_mask); |
137 | return; | 137 | return; |
138 | } | 138 | } |
@@ -167,10 +167,10 @@ static void snb_update_pm_irq(struct drm_i915_private *dev_priv, | |||
167 | 167 | ||
168 | assert_spin_locked(&dev_priv->irq_lock); | 168 | assert_spin_locked(&dev_priv->irq_lock); |
169 | 169 | ||
170 | if (dev_priv->pc8.irqs_disabled) { | 170 | if (dev_priv->pm.irqs_disabled) { |
171 | WARN(1, "IRQs disabled\n"); | 171 | WARN(1, "IRQs disabled\n"); |
172 | dev_priv->pc8.regsave.gen6_pmimr &= ~interrupt_mask; | 172 | dev_priv->pm.regsave.gen6_pmimr &= ~interrupt_mask; |
173 | dev_priv->pc8.regsave.gen6_pmimr |= (~enabled_irq_mask & | 173 | dev_priv->pm.regsave.gen6_pmimr |= (~enabled_irq_mask & |
174 | interrupt_mask); | 174 | interrupt_mask); |
175 | return; | 175 | return; |
176 | } | 176 | } |
@@ -313,11 +313,11 @@ static void ibx_display_interrupt_update(struct drm_i915_private *dev_priv, | |||
313 | 313 | ||
314 | assert_spin_locked(&dev_priv->irq_lock); | 314 | assert_spin_locked(&dev_priv->irq_lock); |
315 | 315 | ||
316 | if (dev_priv->pc8.irqs_disabled && | 316 | if (dev_priv->pm.irqs_disabled && |
317 | (interrupt_mask & SDE_HOTPLUG_MASK_CPT)) { | 317 | (interrupt_mask & SDE_HOTPLUG_MASK_CPT)) { |
318 | WARN(1, "IRQs disabled\n"); | 318 | WARN(1, "IRQs disabled\n"); |
319 | dev_priv->pc8.regsave.sdeimr &= ~interrupt_mask; | 319 | dev_priv->pm.regsave.sdeimr &= ~interrupt_mask; |
320 | dev_priv->pc8.regsave.sdeimr |= (~enabled_irq_mask & | 320 | dev_priv->pm.regsave.sdeimr |= (~enabled_irq_mask & |
321 | interrupt_mask); | 321 | interrupt_mask); |
322 | return; | 322 | return; |
323 | } | 323 | } |
@@ -4118,32 +4118,32 @@ void intel_hpd_init(struct drm_device *dev) | |||
4118 | spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); | 4118 | spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); |
4119 | } | 4119 | } |
4120 | 4120 | ||
4121 | /* Disable interrupts so we can allow Package C8+. */ | 4121 | /* Disable interrupts so we can allow runtime PM. */ |
4122 | void hsw_pc8_disable_interrupts(struct drm_device *dev) | 4122 | void hsw_runtime_pm_disable_interrupts(struct drm_device *dev) |
4123 | { | 4123 | { |
4124 | struct drm_i915_private *dev_priv = dev->dev_private; | 4124 | struct drm_i915_private *dev_priv = dev->dev_private; |
4125 | unsigned long irqflags; | 4125 | unsigned long irqflags; |
4126 | 4126 | ||
4127 | spin_lock_irqsave(&dev_priv->irq_lock, irqflags); | 4127 | spin_lock_irqsave(&dev_priv->irq_lock, irqflags); |
4128 | 4128 | ||
4129 | dev_priv->pc8.regsave.deimr = I915_READ(DEIMR); | 4129 | dev_priv->pm.regsave.deimr = I915_READ(DEIMR); |
4130 | dev_priv->pc8.regsave.sdeimr = I915_READ(SDEIMR); | 4130 | dev_priv->pm.regsave.sdeimr = I915_READ(SDEIMR); |
4131 | dev_priv->pc8.regsave.gtimr = I915_READ(GTIMR); | 4131 | dev_priv->pm.regsave.gtimr = I915_READ(GTIMR); |
4132 | dev_priv->pc8.regsave.gtier = I915_READ(GTIER); | 4132 | dev_priv->pm.regsave.gtier = I915_READ(GTIER); |
4133 | dev_priv->pc8.regsave.gen6_pmimr = I915_READ(GEN6_PMIMR); | 4133 | dev_priv->pm.regsave.gen6_pmimr = I915_READ(GEN6_PMIMR); |
4134 | 4134 | ||
4135 | ironlake_disable_display_irq(dev_priv, 0xffffffff); | 4135 | ironlake_disable_display_irq(dev_priv, 0xffffffff); |
4136 | ibx_disable_display_interrupt(dev_priv, 0xffffffff); | 4136 | ibx_disable_display_interrupt(dev_priv, 0xffffffff); |
4137 | ilk_disable_gt_irq(dev_priv, 0xffffffff); | 4137 | ilk_disable_gt_irq(dev_priv, 0xffffffff); |
4138 | snb_disable_pm_irq(dev_priv, 0xffffffff); | 4138 | snb_disable_pm_irq(dev_priv, 0xffffffff); |
4139 | 4139 | ||
4140 | dev_priv->pc8.irqs_disabled = true; | 4140 | dev_priv->pm.irqs_disabled = true; |
4141 | 4141 | ||
4142 | spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); | 4142 | spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); |
4143 | } | 4143 | } |
4144 | 4144 | ||
4145 | /* Restore interrupts so we can recover from Package C8+. */ | 4145 | /* Restore interrupts so we can recover from runtime PM. */ |
4146 | void hsw_pc8_restore_interrupts(struct drm_device *dev) | 4146 | void hsw_runtime_pm_restore_interrupts(struct drm_device *dev) |
4147 | { | 4147 | { |
4148 | struct drm_i915_private *dev_priv = dev->dev_private; | 4148 | struct drm_i915_private *dev_priv = dev->dev_private; |
4149 | unsigned long irqflags; | 4149 | unsigned long irqflags; |
@@ -4163,13 +4163,13 @@ void hsw_pc8_restore_interrupts(struct drm_device *dev) | |||
4163 | val = I915_READ(GEN6_PMIMR); | 4163 | val = I915_READ(GEN6_PMIMR); |
4164 | WARN(val != 0xffffffff, "GEN6_PMIMR is 0x%08x\n", val); | 4164 | WARN(val != 0xffffffff, "GEN6_PMIMR is 0x%08x\n", val); |
4165 | 4165 | ||
4166 | dev_priv->pc8.irqs_disabled = false; | 4166 | dev_priv->pm.irqs_disabled = false; |
4167 | 4167 | ||
4168 | ironlake_enable_display_irq(dev_priv, ~dev_priv->pc8.regsave.deimr); | 4168 | ironlake_enable_display_irq(dev_priv, ~dev_priv->pm.regsave.deimr); |
4169 | ibx_enable_display_interrupt(dev_priv, ~dev_priv->pc8.regsave.sdeimr); | 4169 | ibx_enable_display_interrupt(dev_priv, ~dev_priv->pm.regsave.sdeimr); |
4170 | ilk_enable_gt_irq(dev_priv, ~dev_priv->pc8.regsave.gtimr); | 4170 | ilk_enable_gt_irq(dev_priv, ~dev_priv->pm.regsave.gtimr); |
4171 | snb_enable_pm_irq(dev_priv, ~dev_priv->pc8.regsave.gen6_pmimr); | 4171 | snb_enable_pm_irq(dev_priv, ~dev_priv->pm.regsave.gen6_pmimr); |
4172 | I915_WRITE(GTIER, dev_priv->pc8.regsave.gtier); | 4172 | I915_WRITE(GTIER, dev_priv->pm.regsave.gtier); |
4173 | 4173 | ||
4174 | spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); | 4174 | spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); |
4175 | } | 4175 | } |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1553fe7542c7..4b5cffa3f033 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -7040,7 +7040,7 @@ void __hsw_do_enable_pc8(struct drm_i915_private *dev_priv) | |||
7040 | } | 7040 | } |
7041 | 7041 | ||
7042 | lpt_disable_clkout_dp(dev); | 7042 | lpt_disable_clkout_dp(dev); |
7043 | hsw_pc8_disable_interrupts(dev); | 7043 | hsw_runtime_pm_disable_interrupts(dev); |
7044 | hsw_disable_lcpll(dev_priv, true, true); | 7044 | hsw_disable_lcpll(dev_priv, true, true); |
7045 | } | 7045 | } |
7046 | 7046 | ||
@@ -7054,7 +7054,7 @@ void __hsw_do_disable_pc8(struct drm_i915_private *dev_priv) | |||
7054 | DRM_DEBUG_KMS("Disabling package C8+\n"); | 7054 | DRM_DEBUG_KMS("Disabling package C8+\n"); |
7055 | 7055 | ||
7056 | hsw_restore_lcpll(dev_priv); | 7056 | hsw_restore_lcpll(dev_priv); |
7057 | hsw_pc8_restore_interrupts(dev); | 7057 | hsw_runtime_pm_restore_interrupts(dev); |
7058 | lpt_init_pch_refclk(dev); | 7058 | lpt_init_pch_refclk(dev); |
7059 | 7059 | ||
7060 | if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) { | 7060 | if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) { |
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 345e95833cf4..a0d4315045be 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -621,8 +621,8 @@ void ilk_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); | |||
621 | void ilk_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); | 621 | void ilk_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
622 | void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); | 622 | void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
623 | void snb_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); | 623 | void snb_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
624 | void hsw_pc8_disable_interrupts(struct drm_device *dev); | 624 | void hsw_runtime_pm_disable_interrupts(struct drm_device *dev); |
625 | void hsw_pc8_restore_interrupts(struct drm_device *dev); | 625 | void hsw_runtime_pm_restore_interrupts(struct drm_device *dev); |
626 | 626 | ||
627 | 627 | ||
628 | /* intel_crt.c */ | 628 | /* intel_crt.c */ |
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index ddd0368460ae..fcca82cd9695 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -6158,7 +6158,8 @@ void intel_pm_setup(struct drm_device *dev) | |||
6158 | mutex_init(&dev_priv->rps.hw_lock); | 6158 | mutex_init(&dev_priv->rps.hw_lock); |
6159 | 6159 | ||
6160 | mutex_init(&dev_priv->pc8.lock); | 6160 | mutex_init(&dev_priv->pc8.lock); |
6161 | dev_priv->pc8.irqs_disabled = false; | ||
6162 | INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work, | 6161 | INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work, |
6163 | intel_gen6_powersave_work); | 6162 | intel_gen6_powersave_work); |
6163 | |||
6164 | dev_priv->pm.irqs_disabled = false; | ||
6164 | } | 6165 | } |