diff options
author | Dave Airlie <airlied@redhat.com> | 2012-01-26 13:25:54 -0500 |
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committer | Dave Airlie <airlied@redhat.com> | 2012-01-26 13:25:54 -0500 |
commit | c8fe74ae9a7285767cda1a053cfe806d67f77227 (patch) | |
tree | 592cf9380cf27c66f574de62febe582e1b06bfa1 /drivers/gpu/drm/i915/intel_sdvo.c | |
parent | 9f1feed2e16652a6e599ed4a73b4c501bb3d4568 (diff) | |
parent | 93b525dccf212e50a895792d79d64bdb53312f5c (diff) |
Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~keithp/linux into drm-fixes
* 'drm-intel-fixes' of git://people.freedesktop.org/~keithp/linux: (24 commits)
drm/i915: fixup forcewake spinlock fallout in drpc debugfs function
drm/i915: debugfs: show semaphore registers also on gen7
drm/i915: allow userspace forcewake references also on gen7
drm/i915: Re-enable gen7 RC6 and GPU turbo after resume.
drm/i915: Correct debugfs printout for RC1e.
Revert "drm/i915: Work around gen7 BLT ring synchronization issues."
drm/i915: rip out the HWSTAM missed irq workaround
drm/i915: paper over missed irq issues with force wake voodoo
drm/i915: Hold gt_lock across forcewake register reads
drm/i915: Hold gt_lock during reset
drm/i915: Move reset forcewake processing to gen6_do_reset
drm/i915: protect force_wake_(get|put) with the gt_lock
drm/i915: convert force_wake_get to func pointer in the gpu reset code
drm/i915: sprite init failure on pre-SNB is not a failure
drm/i915: VBT Parser cleanup for eDP block
drm/i915: mask transcoder select bits before setting them on LVDS
drm/i915: Add Clientron E830 to the ignore LVDS list
CHROMIUM: i915: Add DMI override to skip CRT initialization on ZGB
drm/i915: handle 3rd pipe
drm/i915: simplify pipe checking
...
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sdvo.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_sdvo.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index f7b9268df266..e334ec33a47d 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c | |||
@@ -1066,15 +1066,13 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
1066 | 1066 | ||
1067 | /* Set the SDVO control regs. */ | 1067 | /* Set the SDVO control regs. */ |
1068 | if (INTEL_INFO(dev)->gen >= 4) { | 1068 | if (INTEL_INFO(dev)->gen >= 4) { |
1069 | sdvox = 0; | 1069 | /* The real mode polarity is set by the SDVO commands, using |
1070 | * struct intel_sdvo_dtd. */ | ||
1071 | sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; | ||
1070 | if (intel_sdvo->is_hdmi) | 1072 | if (intel_sdvo->is_hdmi) |
1071 | sdvox |= intel_sdvo->color_range; | 1073 | sdvox |= intel_sdvo->color_range; |
1072 | if (INTEL_INFO(dev)->gen < 5) | 1074 | if (INTEL_INFO(dev)->gen < 5) |
1073 | sdvox |= SDVO_BORDER_ENABLE; | 1075 | sdvox |= SDVO_BORDER_ENABLE; |
1074 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) | ||
1075 | sdvox |= SDVO_VSYNC_ACTIVE_HIGH; | ||
1076 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) | ||
1077 | sdvox |= SDVO_HSYNC_ACTIVE_HIGH; | ||
1078 | } else { | 1076 | } else { |
1079 | sdvox = I915_READ(intel_sdvo->sdvo_reg); | 1077 | sdvox = I915_READ(intel_sdvo->sdvo_reg); |
1080 | switch (intel_sdvo->sdvo_reg) { | 1078 | switch (intel_sdvo->sdvo_reg) { |