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authorChris Wilson <chris@chris-wilson.co.uk>2012-11-16 06:43:20 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-11-16 07:47:40 -0500
commit6b8294a4d392c2c9f8867e8505511f3fc9419ba7 (patch)
tree19108a7b37d5167877f2ae44b4d27fe27f917a90 /drivers/gpu/drm/i915/intel_ringbuffer.c
parentd640c4b09a5d83a8167eb09d22bd89d9fa7e3b91 (diff)
drm/i915: Restore physical HWS_PGA after resume
By always setting up the HWS register for both physical and virtual address variations during render ring we can reduce the number of different special cases that get set up at varying different times during module load. Fixes regression from commit c630119f43471a8ece356b01dabf07f944f453b3 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Wed Oct 17 11:32:57 2012 +0200 drm/i915: don't save/restore HWS_PGA reg for kms Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c45
1 files changed, 35 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index a035ac223fb0..1aa76892a830 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1079,6 +1079,29 @@ err:
1079 return ret; 1079 return ret;
1080} 1080}
1081 1081
1082static int init_phys_hws_pga(struct intel_ring_buffer *ring)
1083{
1084 struct drm_i915_private *dev_priv = ring->dev->dev_private;
1085 u32 addr;
1086
1087 if (!dev_priv->status_page_dmah) {
1088 dev_priv->status_page_dmah =
1089 drm_pci_alloc(ring->dev, PAGE_SIZE, PAGE_SIZE);
1090 if (!dev_priv->status_page_dmah)
1091 return -ENOMEM;
1092 }
1093
1094 addr = dev_priv->status_page_dmah->busaddr;
1095 if (INTEL_INFO(ring->dev)->gen >= 4)
1096 addr |= (dev_priv->status_page_dmah->busaddr >> 28) & 0xf0;
1097 I915_WRITE(HWS_PGA, addr);
1098
1099 ring->status_page.page_addr = dev_priv->status_page_dmah->vaddr;
1100 memset(ring->status_page.page_addr, 0, PAGE_SIZE);
1101
1102 return 0;
1103}
1104
1082static int intel_init_ring_buffer(struct drm_device *dev, 1105static int intel_init_ring_buffer(struct drm_device *dev,
1083 struct intel_ring_buffer *ring) 1106 struct intel_ring_buffer *ring)
1084{ 1107{
@@ -1097,6 +1120,11 @@ static int intel_init_ring_buffer(struct drm_device *dev,
1097 ret = init_status_page(ring); 1120 ret = init_status_page(ring);
1098 if (ret) 1121 if (ret)
1099 return ret; 1122 return ret;
1123 } else {
1124 BUG_ON(ring->id != RCS);
1125 ret = init_phys_hws_pga(ring);
1126 if (ret)
1127 return ret;
1100 } 1128 }
1101 1129
1102 obj = i915_gem_alloc_object(dev, ring->size); 1130 obj = i915_gem_alloc_object(dev, ring->size);
@@ -1545,12 +1573,6 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
1545 ring->init = init_render_ring; 1573 ring->init = init_render_ring;
1546 ring->cleanup = render_ring_cleanup; 1574 ring->cleanup = render_ring_cleanup;
1547 1575
1548
1549 if (!I915_NEED_GFX_HWS(dev)) {
1550 ring->status_page.page_addr = dev_priv->status_page_dmah->vaddr;
1551 memset(ring->status_page.page_addr, 0, PAGE_SIZE);
1552 }
1553
1554 return intel_init_ring_buffer(dev, ring); 1576 return intel_init_ring_buffer(dev, ring);
1555} 1577}
1556 1578
@@ -1558,6 +1580,7 @@ int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size)
1558{ 1580{
1559 drm_i915_private_t *dev_priv = dev->dev_private; 1581 drm_i915_private_t *dev_priv = dev->dev_private;
1560 struct intel_ring_buffer *ring = &dev_priv->ring[RCS]; 1582 struct intel_ring_buffer *ring = &dev_priv->ring[RCS];
1583 int ret;
1561 1584
1562 ring->name = "render ring"; 1585 ring->name = "render ring";
1563 ring->id = RCS; 1586 ring->id = RCS;
@@ -1595,9 +1618,6 @@ int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size)
1595 ring->init = init_render_ring; 1618 ring->init = init_render_ring;
1596 ring->cleanup = render_ring_cleanup; 1619 ring->cleanup = render_ring_cleanup;
1597 1620
1598 if (!I915_NEED_GFX_HWS(dev))
1599 ring->status_page.page_addr = dev_priv->status_page_dmah->vaddr;
1600
1601 ring->dev = dev; 1621 ring->dev = dev;
1602 INIT_LIST_HEAD(&ring->active_list); 1622 INIT_LIST_HEAD(&ring->active_list);
1603 INIT_LIST_HEAD(&ring->request_list); 1623 INIT_LIST_HEAD(&ring->request_list);
@@ -1614,6 +1634,12 @@ int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size)
1614 return -ENOMEM; 1634 return -ENOMEM;
1615 } 1635 }
1616 1636
1637 if (!I915_NEED_GFX_HWS(dev)) {
1638 ret = init_phys_hws_pga(ring);
1639 if (ret)
1640 return ret;
1641 }
1642
1617 return 0; 1643 return 0;
1618} 1644}
1619 1645
@@ -1662,7 +1688,6 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
1662 } 1688 }
1663 ring->init = init_ring_common; 1689 ring->init = init_ring_common;
1664 1690
1665
1666 return intel_init_ring_buffer(dev, ring); 1691 return intel_init_ring_buffer(dev, ring);
1667} 1692}
1668 1693