diff options
author | Kevin Hilman <khilman@linaro.org> | 2013-12-20 11:30:50 -0500 |
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committer | Kevin Hilman <khilman@linaro.org> | 2013-12-20 11:30:50 -0500 |
commit | cd15c51d6c2f577f896471a058f33a95f164dba2 (patch) | |
tree | 9d42b8ea581ca35bdf75467b8bbbab21e7056ff9 /drivers/gpu/drm/i915/intel_pm.c | |
parent | 5b8314a98888b12159d0b1b14982b8dd2d94e3f5 (diff) | |
parent | 130f769e81fc472beb2211320777e26050e3fa15 (diff) |
Merge tag 'omap-for-v3.13/display-fix' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
I accidentally removed some mux code for omap4 that I thought was
dead code as omap4 has been booting with device tree only since
v3.10. Turns out I also removed some display related mux code,
so let's revert that except for the dead code parts.
* tag 'omap-for-v3.13/display-fix' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (439 commits)
Revert "ARM: OMAP2+: Remove legacy mux code for display.c"
+Linux 3.13-rc4
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index caf2ee4e5441..6e0d5e075b15 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -1180,7 +1180,7 @@ static bool g4x_compute_wm0(struct drm_device *dev, | |||
1180 | 1180 | ||
1181 | adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode; | 1181 | adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode; |
1182 | clock = adjusted_mode->crtc_clock; | 1182 | clock = adjusted_mode->crtc_clock; |
1183 | htotal = adjusted_mode->htotal; | 1183 | htotal = adjusted_mode->crtc_htotal; |
1184 | hdisplay = to_intel_crtc(crtc)->config.pipe_src_w; | 1184 | hdisplay = to_intel_crtc(crtc)->config.pipe_src_w; |
1185 | pixel_size = crtc->fb->bits_per_pixel / 8; | 1185 | pixel_size = crtc->fb->bits_per_pixel / 8; |
1186 | 1186 | ||
@@ -1267,7 +1267,7 @@ static bool g4x_compute_srwm(struct drm_device *dev, | |||
1267 | crtc = intel_get_crtc_for_plane(dev, plane); | 1267 | crtc = intel_get_crtc_for_plane(dev, plane); |
1268 | adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode; | 1268 | adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode; |
1269 | clock = adjusted_mode->crtc_clock; | 1269 | clock = adjusted_mode->crtc_clock; |
1270 | htotal = adjusted_mode->htotal; | 1270 | htotal = adjusted_mode->crtc_htotal; |
1271 | hdisplay = to_intel_crtc(crtc)->config.pipe_src_w; | 1271 | hdisplay = to_intel_crtc(crtc)->config.pipe_src_w; |
1272 | pixel_size = crtc->fb->bits_per_pixel / 8; | 1272 | pixel_size = crtc->fb->bits_per_pixel / 8; |
1273 | 1273 | ||
@@ -1498,7 +1498,7 @@ static void i965_update_wm(struct drm_crtc *unused_crtc) | |||
1498 | const struct drm_display_mode *adjusted_mode = | 1498 | const struct drm_display_mode *adjusted_mode = |
1499 | &to_intel_crtc(crtc)->config.adjusted_mode; | 1499 | &to_intel_crtc(crtc)->config.adjusted_mode; |
1500 | int clock = adjusted_mode->crtc_clock; | 1500 | int clock = adjusted_mode->crtc_clock; |
1501 | int htotal = adjusted_mode->htotal; | 1501 | int htotal = adjusted_mode->crtc_htotal; |
1502 | int hdisplay = to_intel_crtc(crtc)->config.pipe_src_w; | 1502 | int hdisplay = to_intel_crtc(crtc)->config.pipe_src_w; |
1503 | int pixel_size = crtc->fb->bits_per_pixel / 8; | 1503 | int pixel_size = crtc->fb->bits_per_pixel / 8; |
1504 | unsigned long line_time_us; | 1504 | unsigned long line_time_us; |
@@ -1624,7 +1624,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc) | |||
1624 | const struct drm_display_mode *adjusted_mode = | 1624 | const struct drm_display_mode *adjusted_mode = |
1625 | &to_intel_crtc(enabled)->config.adjusted_mode; | 1625 | &to_intel_crtc(enabled)->config.adjusted_mode; |
1626 | int clock = adjusted_mode->crtc_clock; | 1626 | int clock = adjusted_mode->crtc_clock; |
1627 | int htotal = adjusted_mode->htotal; | 1627 | int htotal = adjusted_mode->crtc_htotal; |
1628 | int hdisplay = to_intel_crtc(enabled)->config.pipe_src_w; | 1628 | int hdisplay = to_intel_crtc(enabled)->config.pipe_src_w; |
1629 | int pixel_size = enabled->fb->bits_per_pixel / 8; | 1629 | int pixel_size = enabled->fb->bits_per_pixel / 8; |
1630 | unsigned long line_time_us; | 1630 | unsigned long line_time_us; |
@@ -1776,7 +1776,7 @@ static bool ironlake_compute_srwm(struct drm_device *dev, int level, int plane, | |||
1776 | crtc = intel_get_crtc_for_plane(dev, plane); | 1776 | crtc = intel_get_crtc_for_plane(dev, plane); |
1777 | adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode; | 1777 | adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode; |
1778 | clock = adjusted_mode->crtc_clock; | 1778 | clock = adjusted_mode->crtc_clock; |
1779 | htotal = adjusted_mode->htotal; | 1779 | htotal = adjusted_mode->crtc_htotal; |
1780 | hdisplay = to_intel_crtc(crtc)->config.pipe_src_w; | 1780 | hdisplay = to_intel_crtc(crtc)->config.pipe_src_w; |
1781 | pixel_size = crtc->fb->bits_per_pixel / 8; | 1781 | pixel_size = crtc->fb->bits_per_pixel / 8; |
1782 | 1782 | ||
@@ -2469,8 +2469,9 @@ hsw_compute_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc) | |||
2469 | /* The WM are computed with base on how long it takes to fill a single | 2469 | /* The WM are computed with base on how long it takes to fill a single |
2470 | * row at the given clock rate, multiplied by 8. | 2470 | * row at the given clock rate, multiplied by 8. |
2471 | * */ | 2471 | * */ |
2472 | linetime = DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8, mode->clock); | 2472 | linetime = DIV_ROUND_CLOSEST(mode->crtc_htotal * 1000 * 8, |
2473 | ips_linetime = DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8, | 2473 | mode->crtc_clock); |
2474 | ips_linetime = DIV_ROUND_CLOSEST(mode->crtc_htotal * 1000 * 8, | ||
2474 | intel_ddi_get_cdclk_freq(dev_priv)); | 2475 | intel_ddi_get_cdclk_freq(dev_priv)); |
2475 | 2476 | ||
2476 | return PIPE_WM_LINETIME_IPS_LINETIME(ips_linetime) | | 2477 | return PIPE_WM_LINETIME_IPS_LINETIME(ips_linetime) | |