diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-04 02:29:23 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-04 02:29:23 -0400 |
commit | 612a9aab56a93533e76e3ad91642db7033e03b69 (patch) | |
tree | 8402096973f67af941f9392f7da06cca03e0b58a /drivers/gpu/drm/i915/intel_overlay.c | |
parent | 3a494318b14b1bc0f59d2d6ce84c505c74d82d2a (diff) | |
parent | 268d28371cd326be4dfcd7eba5917bf4b9d30c8f (diff) |
Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm merge (part 1) from Dave Airlie:
"So first of all my tree and uapi stuff has a conflict mess, its my
fault as the nouveau stuff didn't hit -next as were trying to rebase
regressions out of it before we merged.
Highlights:
- SH mobile modesetting driver and associated helpers
- some DRM core documentation
- i915 modesetting rework, haswell hdmi, haswell and vlv fixes, write
combined pte writing, ilk rc6 support,
- nouveau: major driver rework into a hw core driver, makes features
like SLI a lot saner to implement,
- psb: add eDP/DP support for Cedarview
- radeon: 2 layer page tables, async VM pte updates, better PLL
selection for > 2 screens, better ACPI interactions
The rest is general grab bag of fixes.
So why part 1? well I have the exynos pull req which came in a bit
late but was waiting for me to do something they shouldn't have and it
looks fairly safe, and David Howells has some more header cleanups
he'd like me to pull, that seem like a good idea, but I'd like to get
this merge out of the way so -next dosen't get blocked."
Tons of conflicts mostly due to silly include line changes, but mostly
mindless. A few other small semantic conflicts too, noted from Dave's
pre-merged branch.
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (447 commits)
drm/nv98/crypt: fix fuc build with latest envyas
drm/nouveau/devinit: fixup various issues with subdev ctor/init ordering
drm/nv41/vm: fix and enable use of "real" pciegart
drm/nv44/vm: fix and enable use of "real" pciegart
drm/nv04/dmaobj: fixup vm target handling in preparation for nv4x pcie
drm/nouveau: store supported dma mask in vmmgr
drm/nvc0/ibus: initial implementation of subdev
drm/nouveau/therm: add support for fan-control modes
drm/nouveau/hwmon: rename pwm0* to pmw1* to follow hwmon's rules
drm/nouveau/therm: calculate the pwm divisor on nv50+
drm/nouveau/fan: rewrite the fan tachometer driver to get more precision, faster
drm/nouveau/therm: move thermal-related functions to the therm subdev
drm/nouveau/bios: parse the pwm divisor from the perf table
drm/nouveau/therm: use the EXTDEV table to detect i2c monitoring devices
drm/nouveau/therm: rework thermal table parsing
drm/nouveau/gpio: expose the PWM/TOGGLE parameter found in the gpio vbios table
drm/nouveau: fix pm initialization order
drm/nouveau/bios: check that fixed tvdac gpio data is valid before using it
drm/nouveau: log channel debug/error messages from client object rather than drm client
drm/nouveau: have drm debugging macros build on top of core macros
...
Diffstat (limited to 'drivers/gpu/drm/i915/intel_overlay.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_overlay.c | 60 |
1 files changed, 2 insertions, 58 deletions
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index 10510221d763..ebff850a9ab6 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c | |||
@@ -234,54 +234,6 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay, | |||
234 | return 0; | 234 | return 0; |
235 | } | 235 | } |
236 | 236 | ||
237 | /* Workaround for i830 bug where pipe a must be enable to change control regs */ | ||
238 | static int | ||
239 | i830_activate_pipe_a(struct drm_device *dev) | ||
240 | { | ||
241 | drm_i915_private_t *dev_priv = dev->dev_private; | ||
242 | struct intel_crtc *crtc; | ||
243 | struct drm_crtc_helper_funcs *crtc_funcs; | ||
244 | struct drm_display_mode vesa_640x480 = { | ||
245 | DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, | ||
246 | 752, 800, 0, 480, 489, 492, 525, 0, | ||
247 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) | ||
248 | }, *mode; | ||
249 | |||
250 | crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[0]); | ||
251 | if (crtc->dpms_mode == DRM_MODE_DPMS_ON) | ||
252 | return 0; | ||
253 | |||
254 | /* most i8xx have pipe a forced on, so don't trust dpms mode */ | ||
255 | if (I915_READ(_PIPEACONF) & PIPECONF_ENABLE) | ||
256 | return 0; | ||
257 | |||
258 | crtc_funcs = crtc->base.helper_private; | ||
259 | if (crtc_funcs->dpms == NULL) | ||
260 | return 0; | ||
261 | |||
262 | DRM_DEBUG_DRIVER("Enabling pipe A in order to enable overlay\n"); | ||
263 | |||
264 | mode = drm_mode_duplicate(dev, &vesa_640x480); | ||
265 | |||
266 | if (!drm_crtc_helper_set_mode(&crtc->base, mode, | ||
267 | crtc->base.x, crtc->base.y, | ||
268 | crtc->base.fb)) | ||
269 | return 0; | ||
270 | |||
271 | crtc_funcs->dpms(&crtc->base, DRM_MODE_DPMS_ON); | ||
272 | return 1; | ||
273 | } | ||
274 | |||
275 | static void | ||
276 | i830_deactivate_pipe_a(struct drm_device *dev) | ||
277 | { | ||
278 | drm_i915_private_t *dev_priv = dev->dev_private; | ||
279 | struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[0]; | ||
280 | struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; | ||
281 | |||
282 | crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF); | ||
283 | } | ||
284 | |||
285 | /* overlay needs to be disable in OCMD reg */ | 237 | /* overlay needs to be disable in OCMD reg */ |
286 | static int intel_overlay_on(struct intel_overlay *overlay) | 238 | static int intel_overlay_on(struct intel_overlay *overlay) |
287 | { | 239 | { |
@@ -289,17 +241,12 @@ static int intel_overlay_on(struct intel_overlay *overlay) | |||
289 | struct drm_i915_private *dev_priv = dev->dev_private; | 241 | struct drm_i915_private *dev_priv = dev->dev_private; |
290 | struct intel_ring_buffer *ring = &dev_priv->ring[RCS]; | 242 | struct intel_ring_buffer *ring = &dev_priv->ring[RCS]; |
291 | struct drm_i915_gem_request *request; | 243 | struct drm_i915_gem_request *request; |
292 | int pipe_a_quirk = 0; | ||
293 | int ret; | 244 | int ret; |
294 | 245 | ||
295 | BUG_ON(overlay->active); | 246 | BUG_ON(overlay->active); |
296 | overlay->active = 1; | 247 | overlay->active = 1; |
297 | 248 | ||
298 | if (IS_I830(dev)) { | 249 | WARN_ON(IS_I830(dev) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE)); |
299 | pipe_a_quirk = i830_activate_pipe_a(dev); | ||
300 | if (pipe_a_quirk < 0) | ||
301 | return pipe_a_quirk; | ||
302 | } | ||
303 | 250 | ||
304 | request = kzalloc(sizeof(*request), GFP_KERNEL); | 251 | request = kzalloc(sizeof(*request), GFP_KERNEL); |
305 | if (request == NULL) { | 252 | if (request == NULL) { |
@@ -321,9 +268,6 @@ static int intel_overlay_on(struct intel_overlay *overlay) | |||
321 | 268 | ||
322 | ret = intel_overlay_do_wait_request(overlay, request, NULL); | 269 | ret = intel_overlay_do_wait_request(overlay, request, NULL); |
323 | out: | 270 | out: |
324 | if (pipe_a_quirk) | ||
325 | i830_deactivate_pipe_a(dev); | ||
326 | |||
327 | return ret; | 271 | return ret; |
328 | } | 272 | } |
329 | 273 | ||
@@ -1438,7 +1382,7 @@ void intel_setup_overlay(struct drm_device *dev) | |||
1438 | } | 1382 | } |
1439 | overlay->flip_addr = reg_bo->phys_obj->handle->busaddr; | 1383 | overlay->flip_addr = reg_bo->phys_obj->handle->busaddr; |
1440 | } else { | 1384 | } else { |
1441 | ret = i915_gem_object_pin(reg_bo, PAGE_SIZE, true); | 1385 | ret = i915_gem_object_pin(reg_bo, PAGE_SIZE, true, false); |
1442 | if (ret) { | 1386 | if (ret) { |
1443 | DRM_ERROR("failed to pin overlay register bo\n"); | 1387 | DRM_ERROR("failed to pin overlay register bo\n"); |
1444 | goto out_free_bo; | 1388 | goto out_free_bo; |