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authorChris Wilson <chris@chris-wilson.co.uk>2011-07-18 16:11:49 -0400
committerKeith Packard <keithp@keithp.com>2011-07-18 17:02:06 -0400
commite28f87116503f796aba4fb27d81e2c3d81966174 (patch)
tree9fb1ef4243707e686a3c1a512931942562267e64 /drivers/gpu/drm/i915/intel_dvo.c
parent435793dfb8aec7b2e19f72d5bce8a22fd0b57839 (diff)
drm/i915: Fix unfenced alignment on pre-G33 hardware
Align unfenced buffers on older hardware to the power-of-two object size. The docs suggest that it should be possible to align only to a power-of-two tile height, but using the already computed fence size is easier and always correct. We also have to make sure that we unbind misaligned buffers upon tiling changes. In order to prevent a repetition of this bug, we change the interface to the alignment computation routines to force the caller to provide the requested alignment and size of the GTT binding rather than assume the current values on the object. Reported-and-tested-by: Sitosfe Wheeler <sitsofe@yahoo.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36326 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dvo.c')
0 files changed, 0 insertions, 0 deletions