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authorShobhit Kumar <shobhit.kumar@intel.com>2013-12-10 01:45:00 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-12-11 17:52:20 -0500
commitf6da28429a90c87c8329425297a36b85345a3f75 (patch)
treeb3894e1850e79e3d73f520e5e1b722c744bfaa11 /drivers/gpu/drm/i915/intel_dsi.h
parenta4a593be5dcb39ac565fd2dd5a359456070328ac (diff)
drm/i915: Parametrize the dphy and other spec specific parameters
The values of these parameters will be different for differnet panel based on dsi rate, lane count, etc. Remove the hardcodings and make these as parameters whch will be initialized in panel specific sub-encoder implementaion. This will also form groundwork for planned generic panel sub-encoder implemntation based on VBT design enhancments to support multiple panels v2: Mask away the port_bits before use Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dsi.h')
-rw-r--r--drivers/gpu/drm/i915/intel_dsi.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index 387dfe13cd9b..b4a27cec882f 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -96,6 +96,20 @@ struct intel_dsi {
96 96
97 /* eot for MIPI_EOT_DISABLE register */ 97 /* eot for MIPI_EOT_DISABLE register */
98 u32 eot_disable; 98 u32 eot_disable;
99
100 u32 port_bits;
101 u32 bw_timer;
102 u32 dphy_reg;
103 u32 video_frmt_cfg_bits;
104 u16 lp_byte_clk;
105
106 /* timeouts in byte clocks */
107 u16 lp_rx_timeout;
108 u16 turn_arnd_val;
109 u16 rst_timer_val;
110 u16 hs_to_lp_count;
111 u16 clk_lp_to_hs_count;
112 u16 clk_hs_to_lp_count;
99}; 113};
100 114
101static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder) 115static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)