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authorDaniel Vetter <daniel.vetter@ffwll.ch>2014-04-24 17:54:54 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-05-16 05:58:48 -0400
commit8ac33ed3dc60126a1cb41c11bdd78d0371351d25 (patch)
tree89af16ce7c8c3d170406ec7a864439d917dd40d3 /drivers/gpu/drm/i915/intel_dp.c
parentd41f1efb323e99f680650f77c00907904d246bf7 (diff)
drm/i915/dp: Remove ->mode_set callback
With all the preceding refactoring the dp mode_set callback only computes a bit of state (all derived from the pipe config) and also writes the eld. As long as we do that before we enable the audio bit or depend upon the correct value in intel_dp->DP we'll be fine. No other hw state is touched. We therefore only need to check that clearing intel_dp->DP is save. Which it is since when we re-enable we already mask out all the bits the link training code sets. And we need to keep on doing that so that the re-train loop walking over pre-emph/voltage-swing values still works properly. Reviewed-by: Naresh Kumar Kachhi <naresh.kumar.kachhi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 3fa56f38f929..a14ee4be5d69 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -925,7 +925,7 @@ static void ironlake_set_pll_cpu_edp(struct intel_dp *intel_dp)
925 udelay(500); 925 udelay(500);
926} 926}
927 927
928static void intel_dp_mode_set(struct intel_encoder *encoder) 928static void intel_dp_prepare(struct intel_encoder *encoder)
929{ 929{
930 struct drm_device *dev = encoder->base.dev; 930 struct drm_device *dev = encoder->base.dev;
931 struct drm_i915_private *dev_priv = dev->dev_private; 931 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1902,6 +1902,8 @@ static void g4x_pre_enable_dp(struct intel_encoder *encoder)
1902 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); 1902 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
1903 struct intel_digital_port *dport = dp_to_dig_port(intel_dp); 1903 struct intel_digital_port *dport = dp_to_dig_port(intel_dp);
1904 1904
1905 intel_dp_prepare(encoder);
1906
1905 /* Only ilk+ has port A */ 1907 /* Only ilk+ has port A */
1906 if (dport->port == PORT_A) { 1908 if (dport->port == PORT_A) {
1907 ironlake_set_pll_cpu_edp(intel_dp); 1909 ironlake_set_pll_cpu_edp(intel_dp);
@@ -1958,6 +1960,8 @@ static void vlv_dp_pre_pll_enable(struct intel_encoder *encoder)
1958 enum dpio_channel port = vlv_dport_to_channel(dport); 1960 enum dpio_channel port = vlv_dport_to_channel(dport);
1959 int pipe = intel_crtc->pipe; 1961 int pipe = intel_crtc->pipe;
1960 1962
1963 intel_dp_prepare(encoder);
1964
1961 /* Program Tx lane resets to default */ 1965 /* Program Tx lane resets to default */
1962 mutex_lock(&dev_priv->dpio_lock); 1966 mutex_lock(&dev_priv->dpio_lock);
1963 vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW0(port), 1967 vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW0(port),
@@ -4224,7 +4228,6 @@ intel_dp_init(struct drm_device *dev, int output_reg, enum port port)
4224 DRM_MODE_ENCODER_TMDS); 4228 DRM_MODE_ENCODER_TMDS);
4225 4229
4226 intel_encoder->compute_config = intel_dp_compute_config; 4230 intel_encoder->compute_config = intel_dp_compute_config;
4227 intel_encoder->mode_set = intel_dp_mode_set;
4228 intel_encoder->disable = intel_disable_dp; 4231 intel_encoder->disable = intel_disable_dp;
4229 intel_encoder->get_hw_state = intel_dp_get_hw_state; 4232 intel_encoder->get_hw_state = intel_dp_get_hw_state;
4230 intel_encoder->get_config = intel_dp_get_config; 4233 intel_encoder->get_config = intel_dp_get_config;