aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_display.c
diff options
context:
space:
mode:
authorDaniel Vetter <daniel.vetter@ffwll.ch>2013-06-06 08:55:52 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-06-06 16:35:44 -0400
commitbb760063790fbbc3c956f23aff4dbdfdd3c03818 (patch)
tree98eb28033453c59d178793c3fb4d37189fd010cd /drivers/gpu/drm/i915/intel_display.c
parenta38911a3fede294e2adfd2deea8104dfbbd760c5 (diff)
drm/i915: pipe config quirk infrastructure plus sdvo mode.flags fix
For various reasons the hw state readout might not be able to faithfully match the hw state: - broken hw (like the case which motivated this patch here where the sdvo encoder does not implemented mandatory functionality correctly). - platforms which are not supported fully with the pipe config infrastructure - if our code doesn't support a given hw configuration natively, e.g. special restrictions on the per-pipe panel fitters when they're used in high-quality scaling modes. In all these cases both fastboot and the hw state cross checker need to be aware of these cases and act accordingly. To be able to do this add a new quirk flag to the pipe config structure. The specific case at hand is an sdvo encoder which doesn't implement the get_timings function, so adjusted_mode flags will be wrong. The strange thing though is that the encoder _does_ work, even though it doesn't implement any of the timings functions (so neither get nor set, neither for input nor output timings). Not that non-compliant sdvo encoder are any surprise at all ... v2: - Don't read random garbage from the dtd if the get_timings call failed (suggested by Chris). - Still check the interlaced flag, that's read out from someplace else. We want maximal paranoia, after all. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c22
1 files changed, 14 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 421b7e2ece3b..8d9e7c0e9e4b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8091,6 +8091,9 @@ intel_pipe_config_compare(struct drm_device *dev,
8091 return false; \ 8091 return false; \
8092 } 8092 }
8093 8093
8094#define PIPE_CONF_QUIRK(quirk) \
8095 ((current_config->quirks | pipe_config->quirks) & (quirk))
8096
8094 PIPE_CONF_CHECK_I(cpu_transcoder); 8097 PIPE_CONF_CHECK_I(cpu_transcoder);
8095 8098
8096 PIPE_CONF_CHECK_I(has_pch_encoder); 8099 PIPE_CONF_CHECK_I(has_pch_encoder);
@@ -8121,14 +8124,16 @@ intel_pipe_config_compare(struct drm_device *dev,
8121 PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, 8124 PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
8122 DRM_MODE_FLAG_INTERLACE); 8125 DRM_MODE_FLAG_INTERLACE);
8123 8126
8124 PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, 8127 if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
8125 DRM_MODE_FLAG_PHSYNC); 8128 PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
8126 PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, 8129 DRM_MODE_FLAG_PHSYNC);
8127 DRM_MODE_FLAG_NHSYNC); 8130 PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
8128 PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, 8131 DRM_MODE_FLAG_NHSYNC);
8129 DRM_MODE_FLAG_PVSYNC); 8132 PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
8130 PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, 8133 DRM_MODE_FLAG_PVSYNC);
8131 DRM_MODE_FLAG_NVSYNC); 8134 PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
8135 DRM_MODE_FLAG_NVSYNC);
8136 }
8132 8137
8133 PIPE_CONF_CHECK_I(requested_mode.hdisplay); 8138 PIPE_CONF_CHECK_I(requested_mode.hdisplay);
8134 PIPE_CONF_CHECK_I(requested_mode.vdisplay); 8139 PIPE_CONF_CHECK_I(requested_mode.vdisplay);
@@ -8145,6 +8150,7 @@ intel_pipe_config_compare(struct drm_device *dev,
8145 8150
8146#undef PIPE_CONF_CHECK_I 8151#undef PIPE_CONF_CHECK_I
8147#undef PIPE_CONF_CHECK_FLAGS 8152#undef PIPE_CONF_CHECK_FLAGS
8153#undef PIPE_CONF_QUIRK
8148 8154
8149 return true; 8155 return true;
8150} 8156}