drm/i915: IBX has a fixed pch pll to pch pipe mapping

This should fix breakage introduced in

commit ee7b9f93fd96a72e5d09e2b44024c11880873c6b
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date:   Fri Apr 20 17:11:53 2012 +0100

    drm/i915: manage PCH PLLs separately from pipes

v2: Add a DRM_DEBUG_KMS message to explain why a given pll was
selected, suggested by Chris Wilson.

v3: Actually run git add.

Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49712
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 11 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f3d39f4f6909..3c71850ddf20 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2911,6 +2911,17 @@ static struct intel_pch_pll *intel_get_pch_pll(struct intel_crtc *intel_crtc, u3
                 goto prepare;
         }
 
+        if (HAS_PCH_IBX(dev_priv->dev)) {
+                /* Ironlake PCH has a fixed PLL->PCH pipe mapping. */
+                i = intel_crtc->pipe;
+                pll = &dev_priv->pch_plls[i];
+
+                DRM_DEBUG_KMS("CRTC:%d using pre-allocated PCH PLL %x\n",
+                              intel_crtc->base.base.id, pll->pll_reg);
+
+                goto found;
+        }
+
         for (i = 0; i < dev_priv->num_pch_pll; i++) {
                 pll = &dev_priv->pch_plls[i];