diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-05-08 07:39:59 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-05-08 07:39:59 -0400 |
commit | 5e13a0c5ec05d382b488a691dfb8af015b1dea1e (patch) | |
tree | 7a06dfa1f7661f8908193f2437b32452520221d3 /drivers/gpu/drm/i915/intel_display.c | |
parent | b615b57a124a4af7b68196bc2fb8acc236041fa2 (diff) | |
parent | 4f256e8aa3eda15c11c3cec3ec5336e1fc579cbd (diff) |
Merge remote-tracking branch 'airlied/drm-core-next' into drm-intel-next-queued
Backmerge of drm-next to resolve a few ugly conflicts and to get a few
fixes from 3.4-rc6 (which drm-next has already merged). Note that this
merge also restricts the stencil cache lra evict policy workaround to
snb (as it should) - I had to frob the code anyway because the
CM0_MASK_SHIFT define died in the masked bit cleanups.
We need the backmerge to get Paulo Zanoni's infoframe regression fix
for gm45 - further bugfixes from him touch the same area and would
needlessly conflict.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 23 |
1 files changed, 17 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index e20f8042fddd..6b4139064f9c 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -3150,8 +3150,11 @@ static bool intel_crtc_mode_fixup(struct drm_crtc *crtc, | |||
3150 | return false; | 3150 | return false; |
3151 | } | 3151 | } |
3152 | 3152 | ||
3153 | /* All interlaced capable intel hw wants timings in frames. */ | 3153 | /* All interlaced capable intel hw wants timings in frames. Note though |
3154 | drm_mode_set_crtcinfo(adjusted_mode, 0); | 3154 | * that intel_lvds_mode_fixup does some funny tricks with the crtc |
3155 | * timings, so we need to be careful not to clobber these.*/ | ||
3156 | if (!(adjusted_mode->private_flags & INTEL_MODE_CRTC_TIMINGS_SET)) | ||
3157 | drm_mode_set_crtcinfo(adjusted_mode, 0); | ||
3155 | 3158 | ||
3156 | return true; | 3159 | return true; |
3157 | } | 3160 | } |
@@ -5441,9 +5444,6 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc) | |||
5441 | struct drm_device *dev = crtc->dev; | 5444 | struct drm_device *dev = crtc->dev; |
5442 | drm_i915_private_t *dev_priv = dev->dev_private; | 5445 | drm_i915_private_t *dev_priv = dev->dev_private; |
5443 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 5446 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
5444 | int pipe = intel_crtc->pipe; | ||
5445 | int dpll_reg = DPLL(pipe); | ||
5446 | int dpll = I915_READ(dpll_reg); | ||
5447 | 5447 | ||
5448 | if (HAS_PCH_SPLIT(dev)) | 5448 | if (HAS_PCH_SPLIT(dev)) |
5449 | return; | 5449 | return; |
@@ -5456,10 +5456,15 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc) | |||
5456 | * the manual case. | 5456 | * the manual case. |
5457 | */ | 5457 | */ |
5458 | if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) { | 5458 | if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) { |
5459 | int pipe = intel_crtc->pipe; | ||
5460 | int dpll_reg = DPLL(pipe); | ||
5461 | int dpll; | ||
5462 | |||
5459 | DRM_DEBUG_DRIVER("downclocking LVDS\n"); | 5463 | DRM_DEBUG_DRIVER("downclocking LVDS\n"); |
5460 | 5464 | ||
5461 | assert_panel_unlocked(dev_priv, pipe); | 5465 | assert_panel_unlocked(dev_priv, pipe); |
5462 | 5466 | ||
5467 | dpll = I915_READ(dpll_reg); | ||
5463 | dpll |= DISPLAY_RATE_SELECT_FPA1; | 5468 | dpll |= DISPLAY_RATE_SELECT_FPA1; |
5464 | I915_WRITE(dpll_reg, dpll); | 5469 | I915_WRITE(dpll_reg, dpll); |
5465 | intel_wait_for_vblank(dev, pipe); | 5470 | intel_wait_for_vblank(dev, pipe); |
@@ -5854,7 +5859,13 @@ static int intel_gen6_queue_flip(struct drm_device *dev, | |||
5854 | intel_ring_emit(ring, fb->pitches[0] | obj->tiling_mode); | 5859 | intel_ring_emit(ring, fb->pitches[0] | obj->tiling_mode); |
5855 | intel_ring_emit(ring, obj->gtt_offset); | 5860 | intel_ring_emit(ring, obj->gtt_offset); |
5856 | 5861 | ||
5857 | pf = I915_READ(PF_CTL(intel_crtc->pipe)) & PF_ENABLE; | 5862 | /* Contrary to the suggestions in the documentation, |
5863 | * "Enable Panel Fitter" does not seem to be required when page | ||
5864 | * flipping with a non-native mode, and worse causes a normal | ||
5865 | * modeset to fail. | ||
5866 | * pf = I915_READ(PF_CTL(intel_crtc->pipe)) & PF_ENABLE; | ||
5867 | */ | ||
5868 | pf = 0; | ||
5858 | pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff; | 5869 | pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff; |
5859 | intel_ring_emit(ring, pf | pipesrc); | 5870 | intel_ring_emit(ring, pf | pipesrc); |
5860 | intel_ring_advance(ring); | 5871 | intel_ring_advance(ring); |