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authorZhenyu Wang <zhenyuw@linux.intel.com>2010-03-29 04:13:57 -0400
committerEric Anholt <eric@anholt.net>2010-04-12 12:23:51 -0400
commit55f78c43598dbfbce09034b463ed2abc72f1420d (patch)
tree69f6bb40dfb269034405ec0a9cf1693bd45ab3ca /drivers/gpu/drm/i915/intel_display.c
parent674e2d0885e009c078d89f789f28f63374a4f337 (diff)
drm/i915: convert DP/eDP driver to new encoder/connector structure
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1a7c7ac66efd..e4dd16296fa2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3138,7 +3138,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
3138 bool is_edp = false; 3138 bool is_edp = false;
3139 struct drm_mode_config *mode_config = &dev->mode_config; 3139 struct drm_mode_config *mode_config = &dev->mode_config;
3140 struct drm_encoder *encoder; 3140 struct drm_encoder *encoder;
3141 struct intel_encoder *intel_encoder; 3141 struct intel_encoder *intel_encoder = NULL;
3142 const intel_limit_t *limit; 3142 const intel_limit_t *limit;
3143 int ret; 3143 int ret;
3144 struct fdi_m_n m_n = {0}; 3144 struct fdi_m_n m_n = {0};
@@ -3264,10 +3264,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
3264 /* eDP doesn't require FDI link, so just set DP M/N 3264 /* eDP doesn't require FDI link, so just set DP M/N
3265 according to current link config */ 3265 according to current link config */
3266 if (is_edp) { 3266 if (is_edp) {
3267 struct drm_connector *edp;
3268 target_clock = mode->clock; 3267 target_clock = mode->clock;
3269 edp = intel_pipe_get_connector(crtc); 3268 intel_edp_link_config(intel_encoder,
3270 intel_edp_link_config(to_intel_encoder(edp),
3271 &lane, &link_bw); 3269 &lane, &link_bw);
3272 } else { 3270 } else {
3273 /* DP over FDI requires target mode clock 3271 /* DP over FDI requires target mode clock