aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_display.c
diff options
context:
space:
mode:
authorPaulo Zanoni <paulo.r.zanoni@intel.com>2013-03-06 18:03:13 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-03-17 16:29:10 -0400
commit51889b35224cb05b5a9d187f3ebf872653ae06d2 (patch)
tree508fb9ca97d1e3898cdde4012e37e8edb8e0a844 /drivers/gpu/drm/i915/intel_display.c
parenta18c4c3d8fd5c0abe955b85a41f50798f321618f (diff)
drm/i915: there's no DSPSIZE register on gen4+
So don't read it when capturing the error state. This solves some "unclaimed register" messages on Haswell when we hang the GPU. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1dc6c18f3970..1e706769de66 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9346,7 +9346,8 @@ intel_display_capture_error_state(struct drm_device *dev)
9346 9346
9347 error->plane[i].control = I915_READ(DSPCNTR(i)); 9347 error->plane[i].control = I915_READ(DSPCNTR(i));
9348 error->plane[i].stride = I915_READ(DSPSTRIDE(i)); 9348 error->plane[i].stride = I915_READ(DSPSTRIDE(i));
9349 error->plane[i].size = I915_READ(DSPSIZE(i)); 9349 if (INTEL_INFO(dev)->gen <= 3)
9350 error->plane[i].size = I915_READ(DSPSIZE(i));
9350 error->plane[i].pos = I915_READ(DSPPOS(i)); 9351 error->plane[i].pos = I915_READ(DSPPOS(i));
9351 error->plane[i].addr = I915_READ(DSPADDR(i)); 9352 error->plane[i].addr = I915_READ(DSPADDR(i));
9352 if (INTEL_INFO(dev)->gen >= 4) { 9353 if (INTEL_INFO(dev)->gen >= 4) {
@@ -9390,7 +9391,8 @@ intel_display_print_error_state(struct seq_file *m,
9390 seq_printf(m, "Plane [%d]:\n", i); 9391 seq_printf(m, "Plane [%d]:\n", i);
9391 seq_printf(m, " CNTR: %08x\n", error->plane[i].control); 9392 seq_printf(m, " CNTR: %08x\n", error->plane[i].control);
9392 seq_printf(m, " STRIDE: %08x\n", error->plane[i].stride); 9393 seq_printf(m, " STRIDE: %08x\n", error->plane[i].stride);
9393 seq_printf(m, " SIZE: %08x\n", error->plane[i].size); 9394 if (INTEL_INFO(dev)->gen <= 3)
9395 seq_printf(m, " SIZE: %08x\n", error->plane[i].size);
9394 seq_printf(m, " POS: %08x\n", error->plane[i].pos); 9396 seq_printf(m, " POS: %08x\n", error->plane[i].pos);
9395 seq_printf(m, " ADDR: %08x\n", error->plane[i].addr); 9397 seq_printf(m, " ADDR: %08x\n", error->plane[i].addr);
9396 if (INTEL_INFO(dev)->gen >= 4) { 9398 if (INTEL_INFO(dev)->gen >= 4) {