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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-05-06 21:29:25 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-05-06 21:29:25 -0400
commit1ed31d6db90d51010545921e59d369d2f92b7ac2 (patch)
tree358a0b346bc8135cd5e53700eb44308b1a7c8c5b /drivers/gpu/drm/i915/intel_display.c
parentceba1abcb00b0ef0b1efcd715285f6e05523edef (diff)
parent722154e4cacf015161efe60009ae9be23d492296 (diff)
Merge commit 'origin/master' into next
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c107
1 files changed, 54 insertions, 53 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e7e753b2845f..c7502b6b1600 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -747,16 +747,16 @@ bool intel_pipe_has_type (struct drm_crtc *crtc, int type)
747 list_for_each_entry(l_entry, &mode_config->connector_list, head) { 747 list_for_each_entry(l_entry, &mode_config->connector_list, head) {
748 if (l_entry->encoder && 748 if (l_entry->encoder &&
749 l_entry->encoder->crtc == crtc) { 749 l_entry->encoder->crtc == crtc) {
750 struct intel_output *intel_output = to_intel_output(l_entry); 750 struct intel_encoder *intel_encoder = to_intel_encoder(l_entry);
751 if (intel_output->type == type) 751 if (intel_encoder->type == type)
752 return true; 752 return true;
753 } 753 }
754 } 754 }
755 return false; 755 return false;
756} 756}
757 757
758struct drm_connector * 758static struct drm_connector *
759intel_pipe_get_output (struct drm_crtc *crtc) 759intel_pipe_get_connector (struct drm_crtc *crtc)
760{ 760{
761 struct drm_device *dev = crtc->dev; 761 struct drm_device *dev = crtc->dev;
762 struct drm_mode_config *mode_config = &dev->mode_config; 762 struct drm_mode_config *mode_config = &dev->mode_config;
@@ -1003,7 +1003,7 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
1003 struct drm_i915_private *dev_priv = dev->dev_private; 1003 struct drm_i915_private *dev_priv = dev->dev_private;
1004 struct drm_framebuffer *fb = crtc->fb; 1004 struct drm_framebuffer *fb = crtc->fb;
1005 struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); 1005 struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
1006 struct drm_i915_gem_object *obj_priv = intel_fb->obj->driver_private; 1006 struct drm_i915_gem_object *obj_priv = to_intel_bo(intel_fb->obj);
1007 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 1007 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1008 int plane, i; 1008 int plane, i;
1009 u32 fbc_ctl, fbc_ctl2; 1009 u32 fbc_ctl, fbc_ctl2;
@@ -1080,7 +1080,7 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
1080 struct drm_i915_private *dev_priv = dev->dev_private; 1080 struct drm_i915_private *dev_priv = dev->dev_private;
1081 struct drm_framebuffer *fb = crtc->fb; 1081 struct drm_framebuffer *fb = crtc->fb;
1082 struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); 1082 struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
1083 struct drm_i915_gem_object *obj_priv = intel_fb->obj->driver_private; 1083 struct drm_i915_gem_object *obj_priv = to_intel_bo(intel_fb->obj);
1084 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 1084 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1085 int plane = (intel_crtc->plane == 0 ? DPFC_CTL_PLANEA : 1085 int plane = (intel_crtc->plane == 0 ? DPFC_CTL_PLANEA :
1086 DPFC_CTL_PLANEB); 1086 DPFC_CTL_PLANEB);
@@ -1176,7 +1176,7 @@ static void intel_update_fbc(struct drm_crtc *crtc,
1176 return; 1176 return;
1177 1177
1178 intel_fb = to_intel_framebuffer(fb); 1178 intel_fb = to_intel_framebuffer(fb);
1179 obj_priv = intel_fb->obj->driver_private; 1179 obj_priv = to_intel_bo(intel_fb->obj);
1180 1180
1181 /* 1181 /*
1182 * If FBC is already on, we just have to verify that we can 1182 * If FBC is already on, we just have to verify that we can
@@ -1243,7 +1243,7 @@ out_disable:
1243static int 1243static int
1244intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj) 1244intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj)
1245{ 1245{
1246 struct drm_i915_gem_object *obj_priv = obj->driver_private; 1246 struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
1247 u32 alignment; 1247 u32 alignment;
1248 int ret; 1248 int ret;
1249 1249
@@ -1323,7 +1323,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
1323 1323
1324 intel_fb = to_intel_framebuffer(crtc->fb); 1324 intel_fb = to_intel_framebuffer(crtc->fb);
1325 obj = intel_fb->obj; 1325 obj = intel_fb->obj;
1326 obj_priv = obj->driver_private; 1326 obj_priv = to_intel_bo(obj);
1327 1327
1328 mutex_lock(&dev->struct_mutex); 1328 mutex_lock(&dev->struct_mutex);
1329 ret = intel_pin_and_fence_fb_obj(dev, obj); 1329 ret = intel_pin_and_fence_fb_obj(dev, obj);
@@ -1401,7 +1401,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
1401 1401
1402 if (old_fb) { 1402 if (old_fb) {
1403 intel_fb = to_intel_framebuffer(old_fb); 1403 intel_fb = to_intel_framebuffer(old_fb);
1404 obj_priv = intel_fb->obj->driver_private; 1404 obj_priv = to_intel_bo(intel_fb->obj);
1405 i915_gem_object_unpin(intel_fb->obj); 1405 i915_gem_object_unpin(intel_fb->obj);
1406 } 1406 }
1407 intel_increase_pllclock(crtc, true); 1407 intel_increase_pllclock(crtc, true);
@@ -2917,7 +2917,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2917 int dspsize_reg = (plane == 0) ? DSPASIZE : DSPBSIZE; 2917 int dspsize_reg = (plane == 0) ? DSPASIZE : DSPBSIZE;
2918 int dsppos_reg = (plane == 0) ? DSPAPOS : DSPBPOS; 2918 int dsppos_reg = (plane == 0) ? DSPAPOS : DSPBPOS;
2919 int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC; 2919 int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC;
2920 int refclk, num_outputs = 0; 2920 int refclk, num_connectors = 0;
2921 intel_clock_t clock, reduced_clock; 2921 intel_clock_t clock, reduced_clock;
2922 u32 dpll = 0, fp = 0, fp2 = 0, dspcntr, pipeconf; 2922 u32 dpll = 0, fp = 0, fp2 = 0, dspcntr, pipeconf;
2923 bool ok, has_reduced_clock = false, is_sdvo = false, is_dvo = false; 2923 bool ok, has_reduced_clock = false, is_sdvo = false, is_dvo = false;
@@ -2943,19 +2943,19 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2943 drm_vblank_pre_modeset(dev, pipe); 2943 drm_vblank_pre_modeset(dev, pipe);
2944 2944
2945 list_for_each_entry(connector, &mode_config->connector_list, head) { 2945 list_for_each_entry(connector, &mode_config->connector_list, head) {
2946 struct intel_output *intel_output = to_intel_output(connector); 2946 struct intel_encoder *intel_encoder = to_intel_encoder(connector);
2947 2947
2948 if (!connector->encoder || connector->encoder->crtc != crtc) 2948 if (!connector->encoder || connector->encoder->crtc != crtc)
2949 continue; 2949 continue;
2950 2950
2951 switch (intel_output->type) { 2951 switch (intel_encoder->type) {
2952 case INTEL_OUTPUT_LVDS: 2952 case INTEL_OUTPUT_LVDS:
2953 is_lvds = true; 2953 is_lvds = true;
2954 break; 2954 break;
2955 case INTEL_OUTPUT_SDVO: 2955 case INTEL_OUTPUT_SDVO:
2956 case INTEL_OUTPUT_HDMI: 2956 case INTEL_OUTPUT_HDMI:
2957 is_sdvo = true; 2957 is_sdvo = true;
2958 if (intel_output->needs_tv_clock) 2958 if (intel_encoder->needs_tv_clock)
2959 is_tv = true; 2959 is_tv = true;
2960 break; 2960 break;
2961 case INTEL_OUTPUT_DVO: 2961 case INTEL_OUTPUT_DVO:
@@ -2975,10 +2975,10 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2975 break; 2975 break;
2976 } 2976 }
2977 2977
2978 num_outputs++; 2978 num_connectors++;
2979 } 2979 }
2980 2980
2981 if (is_lvds && dev_priv->lvds_use_ssc && num_outputs < 2) { 2981 if (is_lvds && dev_priv->lvds_use_ssc && num_connectors < 2) {
2982 refclk = dev_priv->lvds_ssc_freq * 1000; 2982 refclk = dev_priv->lvds_ssc_freq * 1000;
2983 DRM_DEBUG_KMS("using SSC reference clock of %d MHz\n", 2983 DRM_DEBUG_KMS("using SSC reference clock of %d MHz\n",
2984 refclk / 1000); 2984 refclk / 1000);
@@ -3049,8 +3049,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
3049 if (is_edp) { 3049 if (is_edp) {
3050 struct drm_connector *edp; 3050 struct drm_connector *edp;
3051 target_clock = mode->clock; 3051 target_clock = mode->clock;
3052 edp = intel_pipe_get_output(crtc); 3052 edp = intel_pipe_get_connector(crtc);
3053 intel_edp_link_config(to_intel_output(edp), 3053 intel_edp_link_config(to_intel_encoder(edp),
3054 &lane, &link_bw); 3054 &lane, &link_bw);
3055 } else { 3055 } else {
3056 /* DP over FDI requires target mode clock 3056 /* DP over FDI requires target mode clock
@@ -3231,7 +3231,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
3231 /* XXX: just matching BIOS for now */ 3231 /* XXX: just matching BIOS for now */
3232 /* dpll |= PLL_REF_INPUT_TVCLKINBC; */ 3232 /* dpll |= PLL_REF_INPUT_TVCLKINBC; */
3233 dpll |= 3; 3233 dpll |= 3;
3234 else if (is_lvds && dev_priv->lvds_use_ssc && num_outputs < 2) 3234 else if (is_lvds && dev_priv->lvds_use_ssc && num_connectors < 2)
3235 dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN; 3235 dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN;
3236 else 3236 else
3237 dpll |= PLL_REF_INPUT_DREFCLK; 3237 dpll |= PLL_REF_INPUT_DREFCLK;
@@ -3511,7 +3511,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
3511 if (!bo) 3511 if (!bo)
3512 return -ENOENT; 3512 return -ENOENT;
3513 3513
3514 obj_priv = bo->driver_private; 3514 obj_priv = to_intel_bo(bo);
3515 3515
3516 if (bo->size < width * height * 4) { 3516 if (bo->size < width * height * 4) {
3517 DRM_ERROR("buffer is to small\n"); 3517 DRM_ERROR("buffer is to small\n");
@@ -3655,9 +3655,9 @@ static void intel_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
3655 * detection. 3655 * detection.
3656 * 3656 *
3657 * It will be up to the load-detect code to adjust the pipe as appropriate for 3657 * It will be up to the load-detect code to adjust the pipe as appropriate for
3658 * its requirements. The pipe will be connected to no other outputs. 3658 * its requirements. The pipe will be connected to no other encoders.
3659 * 3659 *
3660 * Currently this code will only succeed if there is a pipe with no outputs 3660 * Currently this code will only succeed if there is a pipe with no encoders
3661 * configured for it. In the future, it could choose to temporarily disable 3661 * configured for it. In the future, it could choose to temporarily disable
3662 * some outputs to free up a pipe for its use. 3662 * some outputs to free up a pipe for its use.
3663 * 3663 *
@@ -3670,14 +3670,14 @@ static struct drm_display_mode load_detect_mode = {
3670 704, 832, 0, 480, 489, 491, 520, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 3670 704, 832, 0, 480, 489, 491, 520, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
3671}; 3671};
3672 3672
3673struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output, 3673struct drm_crtc *intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
3674 struct drm_display_mode *mode, 3674 struct drm_display_mode *mode,
3675 int *dpms_mode) 3675 int *dpms_mode)
3676{ 3676{
3677 struct intel_crtc *intel_crtc; 3677 struct intel_crtc *intel_crtc;
3678 struct drm_crtc *possible_crtc; 3678 struct drm_crtc *possible_crtc;
3679 struct drm_crtc *supported_crtc =NULL; 3679 struct drm_crtc *supported_crtc =NULL;
3680 struct drm_encoder *encoder = &intel_output->enc; 3680 struct drm_encoder *encoder = &intel_encoder->enc;
3681 struct drm_crtc *crtc = NULL; 3681 struct drm_crtc *crtc = NULL;
3682 struct drm_device *dev = encoder->dev; 3682 struct drm_device *dev = encoder->dev;
3683 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; 3683 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
@@ -3729,8 +3729,8 @@ struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output,
3729 } 3729 }
3730 3730
3731 encoder->crtc = crtc; 3731 encoder->crtc = crtc;
3732 intel_output->base.encoder = encoder; 3732 intel_encoder->base.encoder = encoder;
3733 intel_output->load_detect_temp = true; 3733 intel_encoder->load_detect_temp = true;
3734 3734
3735 intel_crtc = to_intel_crtc(crtc); 3735 intel_crtc = to_intel_crtc(crtc);
3736 *dpms_mode = intel_crtc->dpms_mode; 3736 *dpms_mode = intel_crtc->dpms_mode;
@@ -3755,23 +3755,23 @@ struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output,
3755 return crtc; 3755 return crtc;
3756} 3756}
3757 3757
3758void intel_release_load_detect_pipe(struct intel_output *intel_output, int dpms_mode) 3758void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder, int dpms_mode)
3759{ 3759{
3760 struct drm_encoder *encoder = &intel_output->enc; 3760 struct drm_encoder *encoder = &intel_encoder->enc;
3761 struct drm_device *dev = encoder->dev; 3761 struct drm_device *dev = encoder->dev;
3762 struct drm_crtc *crtc = encoder->crtc; 3762 struct drm_crtc *crtc = encoder->crtc;
3763 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; 3763 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
3764 struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; 3764 struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
3765 3765
3766 if (intel_output->load_detect_temp) { 3766 if (intel_encoder->load_detect_temp) {
3767 encoder->crtc = NULL; 3767 encoder->crtc = NULL;
3768 intel_output->base.encoder = NULL; 3768 intel_encoder->base.encoder = NULL;
3769 intel_output->load_detect_temp = false; 3769 intel_encoder->load_detect_temp = false;
3770 crtc->enabled = drm_helper_crtc_in_use(crtc); 3770 crtc->enabled = drm_helper_crtc_in_use(crtc);
3771 drm_helper_disable_unused_functions(dev); 3771 drm_helper_disable_unused_functions(dev);
3772 } 3772 }
3773 3773
3774 /* Switch crtc and output back off if necessary */ 3774 /* Switch crtc and encoder back off if necessary */
3775 if (crtc->enabled && dpms_mode != DRM_MODE_DPMS_ON) { 3775 if (crtc->enabled && dpms_mode != DRM_MODE_DPMS_ON) {
3776 if (encoder->crtc == crtc) 3776 if (encoder->crtc == crtc)
3777 encoder_funcs->dpms(encoder, dpms_mode); 3777 encoder_funcs->dpms(encoder, dpms_mode);
@@ -4156,7 +4156,7 @@ void intel_finish_page_flip(struct drm_device *dev, int pipe)
4156 work = intel_crtc->unpin_work; 4156 work = intel_crtc->unpin_work;
4157 if (work == NULL || !work->pending) { 4157 if (work == NULL || !work->pending) {
4158 if (work && !work->pending) { 4158 if (work && !work->pending) {
4159 obj_priv = work->pending_flip_obj->driver_private; 4159 obj_priv = to_intel_bo(work->pending_flip_obj);
4160 DRM_DEBUG_DRIVER("flip finish: %p (%d) not pending?\n", 4160 DRM_DEBUG_DRIVER("flip finish: %p (%d) not pending?\n",
4161 obj_priv, 4161 obj_priv,
4162 atomic_read(&obj_priv->pending_flip)); 4162 atomic_read(&obj_priv->pending_flip));
@@ -4181,7 +4181,7 @@ void intel_finish_page_flip(struct drm_device *dev, int pipe)
4181 4181
4182 spin_unlock_irqrestore(&dev->event_lock, flags); 4182 spin_unlock_irqrestore(&dev->event_lock, flags);
4183 4183
4184 obj_priv = work->pending_flip_obj->driver_private; 4184 obj_priv = to_intel_bo(work->pending_flip_obj);
4185 4185
4186 /* Initial scanout buffer will have a 0 pending flip count */ 4186 /* Initial scanout buffer will have a 0 pending flip count */
4187 if ((atomic_read(&obj_priv->pending_flip) == 0) || 4187 if ((atomic_read(&obj_priv->pending_flip) == 0) ||
@@ -4252,7 +4252,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
4252 ret = intel_pin_and_fence_fb_obj(dev, obj); 4252 ret = intel_pin_and_fence_fb_obj(dev, obj);
4253 if (ret != 0) { 4253 if (ret != 0) {
4254 DRM_DEBUG_DRIVER("flip queue: %p pin & fence failed\n", 4254 DRM_DEBUG_DRIVER("flip queue: %p pin & fence failed\n",
4255 obj->driver_private); 4255 to_intel_bo(obj));
4256 kfree(work); 4256 kfree(work);
4257 intel_crtc->unpin_work = NULL; 4257 intel_crtc->unpin_work = NULL;
4258 mutex_unlock(&dev->struct_mutex); 4258 mutex_unlock(&dev->struct_mutex);
@@ -4266,7 +4266,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
4266 crtc->fb = fb; 4266 crtc->fb = fb;
4267 i915_gem_object_flush_write_domain(obj); 4267 i915_gem_object_flush_write_domain(obj);
4268 drm_vblank_get(dev, intel_crtc->pipe); 4268 drm_vblank_get(dev, intel_crtc->pipe);
4269 obj_priv = obj->driver_private; 4269 obj_priv = to_intel_bo(obj);
4270 atomic_inc(&obj_priv->pending_flip); 4270 atomic_inc(&obj_priv->pending_flip);
4271 work->pending_flip_obj = obj; 4271 work->pending_flip_obj = obj;
4272 4272
@@ -4399,8 +4399,8 @@ static int intel_connector_clones(struct drm_device *dev, int type_mask)
4399 int entry = 0; 4399 int entry = 0;
4400 4400
4401 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 4401 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
4402 struct intel_output *intel_output = to_intel_output(connector); 4402 struct intel_encoder *intel_encoder = to_intel_encoder(connector);
4403 if (type_mask & intel_output->clone_mask) 4403 if (type_mask & intel_encoder->clone_mask)
4404 index_mask |= (1 << entry); 4404 index_mask |= (1 << entry);
4405 entry++; 4405 entry++;
4406 } 4406 }
@@ -4495,12 +4495,12 @@ static void intel_setup_outputs(struct drm_device *dev)
4495 intel_tv_init(dev); 4495 intel_tv_init(dev);
4496 4496
4497 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 4497 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
4498 struct intel_output *intel_output = to_intel_output(connector); 4498 struct intel_encoder *intel_encoder = to_intel_encoder(connector);
4499 struct drm_encoder *encoder = &intel_output->enc; 4499 struct drm_encoder *encoder = &intel_encoder->enc;
4500 4500
4501 encoder->possible_crtcs = intel_output->crtc_mask; 4501 encoder->possible_crtcs = intel_encoder->crtc_mask;
4502 encoder->possible_clones = intel_connector_clones(dev, 4502 encoder->possible_clones = intel_connector_clones(dev,
4503 intel_output->clone_mask); 4503 intel_encoder->clone_mask);
4504 } 4504 }
4505} 4505}
4506 4506
@@ -4779,14 +4779,14 @@ void intel_init_clock_gating(struct drm_device *dev)
4779 struct drm_i915_gem_object *obj_priv = NULL; 4779 struct drm_i915_gem_object *obj_priv = NULL;
4780 4780
4781 if (dev_priv->pwrctx) { 4781 if (dev_priv->pwrctx) {
4782 obj_priv = dev_priv->pwrctx->driver_private; 4782 obj_priv = to_intel_bo(dev_priv->pwrctx);
4783 } else { 4783 } else {
4784 struct drm_gem_object *pwrctx; 4784 struct drm_gem_object *pwrctx;
4785 4785
4786 pwrctx = intel_alloc_power_context(dev); 4786 pwrctx = intel_alloc_power_context(dev);
4787 if (pwrctx) { 4787 if (pwrctx) {
4788 dev_priv->pwrctx = pwrctx; 4788 dev_priv->pwrctx = pwrctx;
4789 obj_priv = pwrctx->driver_private; 4789 obj_priv = to_intel_bo(pwrctx);
4790 } 4790 }
4791 } 4791 }
4792 4792
@@ -4815,7 +4815,7 @@ static void intel_init_display(struct drm_device *dev)
4815 dev_priv->display.fbc_enabled = g4x_fbc_enabled; 4815 dev_priv->display.fbc_enabled = g4x_fbc_enabled;
4816 dev_priv->display.enable_fbc = g4x_enable_fbc; 4816 dev_priv->display.enable_fbc = g4x_enable_fbc;
4817 dev_priv->display.disable_fbc = g4x_disable_fbc; 4817 dev_priv->display.disable_fbc = g4x_disable_fbc;
4818 } else if (IS_I965GM(dev) || IS_I945GM(dev) || IS_I915GM(dev)) { 4818 } else if (IS_I965GM(dev)) {
4819 dev_priv->display.fbc_enabled = i8xx_fbc_enabled; 4819 dev_priv->display.fbc_enabled = i8xx_fbc_enabled;
4820 dev_priv->display.enable_fbc = i8xx_enable_fbc; 4820 dev_priv->display.enable_fbc = i8xx_enable_fbc;
4821 dev_priv->display.disable_fbc = i8xx_disable_fbc; 4821 dev_priv->display.disable_fbc = i8xx_disable_fbc;
@@ -4853,17 +4853,18 @@ static void intel_init_display(struct drm_device *dev)
4853 dev_priv->display.update_wm = g4x_update_wm; 4853 dev_priv->display.update_wm = g4x_update_wm;
4854 else if (IS_I965G(dev)) 4854 else if (IS_I965G(dev))
4855 dev_priv->display.update_wm = i965_update_wm; 4855 dev_priv->display.update_wm = i965_update_wm;
4856 else if (IS_I9XX(dev) || IS_MOBILE(dev)) { 4856 else if (IS_I9XX(dev)) {
4857 dev_priv->display.update_wm = i9xx_update_wm; 4857 dev_priv->display.update_wm = i9xx_update_wm;
4858 dev_priv->display.get_fifo_size = i9xx_get_fifo_size; 4858 dev_priv->display.get_fifo_size = i9xx_get_fifo_size;
4859 } else if (IS_I85X(dev)) {
4860 dev_priv->display.update_wm = i9xx_update_wm;
4861 dev_priv->display.get_fifo_size = i85x_get_fifo_size;
4859 } else { 4862 } else {
4860 if (IS_I85X(dev)) 4863 dev_priv->display.update_wm = i830_update_wm;
4861 dev_priv->display.get_fifo_size = i85x_get_fifo_size; 4864 if (IS_845G(dev))
4862 else if (IS_845G(dev))
4863 dev_priv->display.get_fifo_size = i845_get_fifo_size; 4865 dev_priv->display.get_fifo_size = i845_get_fifo_size;
4864 else 4866 else
4865 dev_priv->display.get_fifo_size = i830_get_fifo_size; 4867 dev_priv->display.get_fifo_size = i830_get_fifo_size;
4866 dev_priv->display.update_wm = i830_update_wm;
4867 } 4868 }
4868} 4869}
4869 4870
@@ -4957,7 +4958,7 @@ void intel_modeset_cleanup(struct drm_device *dev)
4957 if (dev_priv->pwrctx) { 4958 if (dev_priv->pwrctx) {
4958 struct drm_i915_gem_object *obj_priv; 4959 struct drm_i915_gem_object *obj_priv;
4959 4960
4960 obj_priv = dev_priv->pwrctx->driver_private; 4961 obj_priv = to_intel_bo(dev_priv->pwrctx);
4961 I915_WRITE(PWRCTXA, obj_priv->gtt_offset &~ PWRCTX_EN); 4962 I915_WRITE(PWRCTXA, obj_priv->gtt_offset &~ PWRCTX_EN);
4962 I915_READ(PWRCTXA); 4963 I915_READ(PWRCTXA);
4963 i915_gem_object_unpin(dev_priv->pwrctx); 4964 i915_gem_object_unpin(dev_priv->pwrctx);
@@ -4978,9 +4979,9 @@ void intel_modeset_cleanup(struct drm_device *dev)
4978*/ 4979*/
4979struct drm_encoder *intel_best_encoder(struct drm_connector *connector) 4980struct drm_encoder *intel_best_encoder(struct drm_connector *connector)
4980{ 4981{
4981 struct intel_output *intel_output = to_intel_output(connector); 4982 struct intel_encoder *intel_encoder = to_intel_encoder(connector);
4982 4983
4983 return &intel_output->enc; 4984 return &intel_encoder->enc;
4984} 4985}
4985 4986
4986/* 4987/*