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authorChris Wilson <chris@chris-wilson.co.uk>2013-08-26 18:51:06 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-09-03 05:10:55 -0400
commit10603caacf599297c7da0c4f4db440d015b8131a (patch)
tree1982b2a47c80f0bdfc021b9669d980e9009b14cd /drivers/gpu/drm/i915/intel_crt.c
parent97e4eed7dc532e20208b0bdf7ad1136569da2f35 (diff)
drm/i915: Apply the force-detect VGA w/a to Valleyview
It appears that Valleyview shares its VGA encoder with more recent siblings and requires the same forced detection cycle after a hardware reset before we can rely on hotplugging. Reported-and-tested-by: kobeqin <kobe.qin@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67733 Tested-by: kobeqin <kobe.qin@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> [danvet: Check for gen >= 5 insted, acked by Chris.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_crt.c')
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index b5a3875f22c7..ea9022ef15d5 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -688,7 +688,7 @@ static void intel_crt_reset(struct drm_connector *connector)
688 struct drm_i915_private *dev_priv = dev->dev_private; 688 struct drm_i915_private *dev_priv = dev->dev_private;
689 struct intel_crt *crt = intel_attached_crt(connector); 689 struct intel_crt *crt = intel_attached_crt(connector);
690 690
691 if (HAS_PCH_SPLIT(dev)) { 691 if (INTEL_INFO(dev)->gen >= 5) {
692 u32 adpa; 692 u32 adpa;
693 693
694 adpa = I915_READ(crt->adpa_reg); 694 adpa = I915_READ(crt->adpa_reg);